[PATCH] D140069: [DAGCombiner] Scalarize vectorized loads that are splatted

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll:1149-1162
+; P8-AIX-32-LABEL: testSplati64_1:
+; P8-AIX-32:       # %bb.0: # %entry
+; P8-AIX-32-NEXT:    lwz r4, L..C4(r2) # %const.0
+; P8-AIX-32-NEXT:    lwz r5, 12(r3)
+; P8-AIX-32-NEXT:    lwz r3, 8(r3)
+; P8-AIX-32-NEXT:    stw r5, -16(r1)
+; P8-AIX-32-NEXT:    stw r3, -32(r1)
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luke wrote:
> These extra lines replace the old `P8-AIX` prefixed checks that must have been left behind
Aren't the P8-AIX/P8-AIX-32/P8-AIX-64 checks still used? There's more likely an issue with aix-32 having a legal <2 x i64> type but no the i64 type


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Comment at: llvm/test/CodeGen/WebAssembly/simd-vectorized-load-splat.ll:5
+; Ensures that vectorized loads that are really just splatted loads, are indeed
+; selected as splatted loads
+
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please can you pre-commit this test file to trunk with trunk's current codegen and then rebase to show the codegen diffs


Repository:
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  https://reviews.llvm.org/D140069/new/

https://reviews.llvm.org/D140069