[llvm] 5be3894 - Revert "[InstCombine] Add test coverage for (icmp slt/sge (1 << Y), 0). NFC"
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sat Jan 14 00:39:45 PST 2023
Author: Craig Topper
Date: 2023-01-14T00:37:01-08:00
New Revision: 5be3894b608420e78e53be13ac9bb4278d3273d4
URL: https://github.com/llvm/llvm-project/commit/5be3894b608420e78e53be13ac9bb4278d3273d4
DIFF: https://github.com/llvm/llvm-project/commit/5be3894b608420e78e53be13ac9bb4278d3273d4.diff
LOG: Revert "[InstCombine] Add test coverage for (icmp slt/sge (1 << Y), 0). NFC"
This reverts commit e25f2287dd7d6854b0bbfb9878fecdbbad21038d.
I messed up the predicates in the description.
Added:
Modified:
llvm/test/Transforms/InstCombine/icmp.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/icmp.ll b/llvm/test/Transforms/InstCombine/icmp.ll
index 60ab8ff3d1791..8126029b3f6ff 100644
--- a/llvm/test/Transforms/InstCombine/icmp.ll
+++ b/llvm/test/Transforms/InstCombine/icmp.ll
@@ -2158,48 +2158,6 @@ define <2 x i1> @icmp_shl_1_V_ult_2147483648_vec(<2 x i32> %V) {
ret <2 x i1> %cmp
}
-define i1 @icmp_shl_1_V_sle_0(i32 %V) {
-; CHECK-LABEL: @icmp_shl_1_V_sle_0(
-; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[V:%.*]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[SHL]], 1
-; CHECK-NEXT: ret i1 [[CMP]]
-;
- %shl = shl i32 1, %V
- %cmp = icmp sle i32 %shl, 0
- ret i1 %cmp
-}
-
-define <2 x i1> @icmp_shl_1_V_sle_0_vec(<2 x i32> %V) {
-; CHECK-LABEL: @icmp_shl_1_V_sle_0_vec(
-; CHECK-NEXT: [[SHL:%.*]] = shl nuw <2 x i32> <i32 1, i32 1>, [[V:%.*]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[SHL]], <i32 1, i32 1>
-; CHECK-NEXT: ret <2 x i1> [[CMP]]
-;
- %shl = shl <2 x i32> <i32 1, i32 1>, %V
- %cmp = icmp sle <2 x i32> %shl, <i32 0, i32 0>
- ret <2 x i1> %cmp
-}
-
-define i1 @icmp_shl_1_V_sgt_0(i32 %V) {
-; CHECK-LABEL: @icmp_shl_1_V_sgt_0(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[V:%.*]], 31
-; CHECK-NEXT: ret i1 [[CMP]]
-;
- %shl = shl i32 1, %V
- %cmp = icmp sgt i32 %shl, 0
- ret i1 %cmp
-}
-
-define <2 x i1> @icmp_shl_1_V_sgt_0_vec(<2 x i32> %V) {
-; CHECK-LABEL: @icmp_shl_1_V_sgt_0_vec(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[V:%.*]], <i32 31, i32 31>
-; CHECK-NEXT: ret <2 x i1> [[CMP]]
-;
- %shl = shl <2 x i32> <i32 1, i32 1>, %V
- %cmp = icmp sgt <2 x i32> %shl, <i32 0, i32 0>
- ret <2 x i1> %cmp
-}
-
define i1 @or_icmp_eq_B_0_icmp_ult_A_B(i64 %a, i64 %b) {
; CHECK-LABEL: @or_icmp_eq_B_0_icmp_ult_A_B(
; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[B:%.*]], -1
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