[PATCH] D141737: [NVPTX] Unforce minimum alignment of 4 for byval arguments of device-side functions.

[Artem Belevich via Phabricator via llvm-commits]

tra added a comment.

Do we need to do it? I mean -- are there any observable differences between enforced alignment of 4 and not? For register-passed parameters it will make no difference, and for the parameters passed via constant/local memory, it may or may not make a difference.

I guess at the extreme it would impact how many 1-byte parameters we may have, as the total size of param address space has an upper bound (for kernels it's 4K: https://docs.nvidia.com/cuda/cuda-c-programming-guide/#parameter-buffer-layout). If that's the case, then it probably does not matter whether we can pass 4K arguments or only 1K.

In other words, I do not see a practical need to introduce an option which may not have any practical use.


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  https://reviews.llvm.org/D141737/new/

https://reviews.llvm.org/D141737