[PATCH] D141302: [MachineCombiner] Lift same-bb restriction for reassociable ops.

[Florian Hahn via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG20ecc0799146: [MachineCombiner] Lift same-bb restriction for reassociable ops. (authored by fhahn).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141302/new/

https://reviews.llvm.org/D141302

Files:
  llvm/lib/CodeGen/TargetInstrInfo.cpp
  llvm/test/CodeGen/AArch64/machine-combiner-reassociate-ops-in-different-blocks.mir
  llvm/test/CodeGen/RISCV/fpclamptosat.ll
  llvm/test/CodeGen/RISCV/fpclamptosat_vec.ll
  llvm/test/CodeGen/RISCV/iabs.ll
  llvm/test/CodeGen/RISCV/mul.ll
  llvm/test/CodeGen/RISCV/neg-abs.ll
  llvm/test/CodeGen/RISCV/rotl-rotr.ll
  llvm/test/CodeGen/RISCV/rv32zbb.ll
  llvm/test/CodeGen/RISCV/rv64i-w-insts-legalization.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store-asm.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-mask-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll
  llvm/test/CodeGen/RISCV/sextw-removal.ll
  llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll
  llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
  llvm/test/CodeGen/X86/AMX/amx-greedy-ra-spill-shape.ll
  llvm/test/CodeGen/X86/mul-constant-result.ll
  llvm/test/CodeGen/X86/optimize-max-0.ll
  llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll

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