[PATCH] D101920: [AArch64][v8.3A] Avoid inserting implicit landing pads (PACI*SP)

Fri Jan 13 07:13:14 PST 2023

danielkiss added a comment.

Linux kernel <https://elixir.bootlin.com/linux/v6.1.4/source/arch/arm64/kernel/cpufeature.c#L2052> sets the the BT0 (and BT1) to 1 unconditionally.
This results the `When the PE is executing at EL0, PACIASP and PACIBSP are not compatible with PSTATE.BTYPE == 0b11.` (ArmARM <https://developer.arm.com/documentation/ddi0595/2021-06/AArch64-Registers/SCTLR-EL1--System-Control-Register--EL1-?lang=en#fieldset_0-35_35-1>)
That means `PACI*SP` is just a `BTI C` from BTI point of view.

I think right now changing the default is reasonable. (reverting this patch)
Maybe just add new subtarget feature that represent this BT flag and change the above `Subtarget.hasPAuth` to `Subtarget.hasBTGoodName..` which is false until needed by a target.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101920/new/

https://reviews.llvm.org/D101920