[PATCH] D138807: [RISCV] Support vector crypto extension ISA string and assembly
Brandon Wu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 13 02:42:02 PST 2023
4vtomat updated this revision to Diff 488924.
4vtomat added a comment.
NFC, refactoring the code.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D138807/new/
https://reviews.llvm.org/D138807
Files:
clang/test/Preprocessor/riscv-target-features.c
llvm/docs/RISCVUsage.rst
llvm/lib/Support/RISCVISAInfo.cpp
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
llvm/lib/Target/RISCV/RISCV.td
llvm/lib/Target/RISCV/RISCVInstrFormats.td
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
llvm/lib/Target/RISCV/RISCVInstrInfo.td
llvm/lib/Target/RISCV/RISCVInstrInfoV.td
llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
llvm/test/CodeGen/RISCV/attributes.ll
llvm/test/MC/RISCV/attribute-arch.s
llvm/test/MC/RISCV/rvv/zvkb.s
llvm/test/MC/RISCV/rvv/zvkg.s
llvm/test/MC/RISCV/rvv/zvknh.s
llvm/test/MC/RISCV/rvv/zvkns-invalid.s
llvm/test/MC/RISCV/rvv/zvkns.s
llvm/test/MC/RISCV/rvv/zvksed-invalid.s
llvm/test/MC/RISCV/rvv/zvksed.s
llvm/test/MC/RISCV/rvv/zvksh.s
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