[llvm] df6ae17 - Revert "[SchedBoundary] Add dump method for resource usage."
Francesco Petrogalli via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 13 02:14:36 PST 2023
Author: Francesco Petrogalli
Date: 2023-01-13T11:14:20+01:00
New Revision: df6ae1779fafd9984e144a27315d6dd65b32c325
URL: https://github.com/llvm/llvm-project/commit/df6ae1779fafd9984e144a27315d6dd65b32c325
DIFF: https://github.com/llvm/llvm-project/commit/df6ae1779fafd9984e144a27315d6dd65b32c325.diff
LOG: Revert "[SchedBoundary] Add dump method for resource usage."
Reverting because of https://lab.llvm.org/buildbot#builders/16/builds/41860
When building on x86, I need to specify also -mtriple in the
invocation of llc otherwise the folllowing error shows up:
'cortex-a55' is not a recognized processor for this target (ignoring processor)
This reverts commit b39a9a94f420a25a239ae03097c255900cbd660e.
Added:
Modified:
llvm/include/llvm/CodeGen/MachineScheduler.h
llvm/lib/CodeGen/MachineScheduler.cpp
Removed:
llvm/test/CodeGen/AArch64/dump-reserved-cycles.mir
################################################################################
diff --git a/llvm/include/llvm/CodeGen/MachineScheduler.h b/llvm/include/llvm/CodeGen/MachineScheduler.h
index 997c3a4f74a18..8000c9db428d6 100644
--- a/llvm/include/llvm/CodeGen/MachineScheduler.h
+++ b/llvm/include/llvm/CodeGen/MachineScheduler.h
@@ -674,33 +674,8 @@ class SchedBoundary {
// scheduled instruction.
SmallVector<unsigned, 16> ReservedCycles;
- /// For each PIdx, stores first index into ReservedCycles that corresponds to
- /// it.
- ///
- /// For example, consider the following 3 resources (ResourceCount =
- /// 3):
- ///
- /// +------------+--------+
- /// |ResourceName|NumUnits|
- /// +------------+--------+
- /// | X | 2 |
- /// +------------+--------+
- /// | Y | 3 |
- /// +------------+--------+
- /// | Z | 1 |
- /// +------------+--------+
- ///
- /// In this case, the total number of resource instances is 6. The
- /// vector \ref ReservedCycles will have a slot for each instance. The
- /// vector \ref ReservedCyclesIndex will track at what index the first
- /// instance of the resource is found in the vector of \ref
- /// ReservedCycles:
- ///
- /// Indexes of instances in ReservedCycles
- /// 0 1 2 3 4 5
- /// ReservedCyclesIndex[0] = 0; [X0, X1,
- /// ReservedCyclesIndex[1] = 2; Y0, Y1, Y2
- /// ReservedCyclesIndex[2] = 5; Z
+ // For each PIdx, stores first index into ReservedCycles that corresponds to
+ // it.
SmallVector<unsigned, 16> ReservedCyclesIndex;
// For each PIdx, stores the resource group IDs of its subunits
@@ -827,8 +802,6 @@ class SchedBoundary {
/// available instruction, or NULL if there are multiple candidates.
SUnit *pickOnlyChoice();
- /// Dump the state of the information that tracks resource usage.
- void dumpReservedCycles() const;
void dumpScheduledState() const;
};
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index e8c9562da83bd..e5cd46268600e 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -95,9 +95,6 @@ cl::opt<bool> ViewMISchedDAGs(
cl::desc("Pop up a window to show MISched dags after they are processed"));
cl::opt<bool> PrintDAGs("misched-print-dags", cl::Hidden,
cl::desc("Print schedule DAGs"));
-cl::opt<bool> MISchedDumpReservedCycles(
- "misched-dump-reserved-cycles", cl::Hidden, cl::init(false),
- cl::desc("Dump resource usage at schedule boundary."));
#else
const bool ViewMISchedDAGs = false;
const bool PrintDAGs = false;
@@ -2592,28 +2589,6 @@ SUnit *SchedBoundary::pickOnlyChoice() {
}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
-
-/// Dump the content of the \ref ReservedCycles vector for the
-/// resources that are used in the basic block.
-///
-LLVM_DUMP_METHOD void SchedBoundary::dumpReservedCycles() const {
- if (!SchedModel->hasInstrSchedModel())
- return;
-
- unsigned ResourceCount = SchedModel->getNumProcResourceKinds();
- unsigned StartIdx = 0;
-
- for (unsigned ResIdx = 0; ResIdx < ResourceCount; ++ResIdx) {
- const unsigned NumUnits = SchedModel->getProcResource(ResIdx)->NumUnits;
- std::string ResName = SchedModel->getResourceName(ResIdx);
- for (unsigned UnitIdx = 0; UnitIdx < NumUnits; ++UnitIdx) {
- dbgs() << ResName << "(" << UnitIdx
- << ") = " << ReservedCycles[StartIdx + UnitIdx] << "\n";
- }
- StartIdx += NumUnits;
- }
-}
-
// This is useful information to dump after bumpNode.
// Note that the Queue contents are more useful before pickNodeFromQueue.
LLVM_DUMP_METHOD void SchedBoundary::dumpScheduledState() const {
@@ -2636,8 +2611,6 @@ LLVM_DUMP_METHOD void SchedBoundary::dumpScheduledState() const {
<< "\n ExpectedLatency: " << ExpectedLatency << "c\n"
<< (IsResourceLimited ? " - Resource" : " - Latency")
<< " limited.\n";
- if (MISchedDumpReservedCycles)
- dumpReservedCycles();
}
#endif
diff --git a/llvm/test/CodeGen/AArch64/dump-reserved-cycles.mir b/llvm/test/CodeGen/AArch64/dump-reserved-cycles.mir
deleted file mode 100644
index 7f58a1a141a06..0000000000000
--- a/llvm/test/CodeGen/AArch64/dump-reserved-cycles.mir
+++ /dev/null
@@ -1,60 +0,0 @@
-# RUN: llc -mcpu=cortex-a55 -misched-dump-reserved-cycles=true \
-# RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler -o - %s 2>&1 | FileCheck %s
-
-# RUN: llc -mcpu=cortex-a55 -misched-dump-reserved-cycles=false\
-# RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler -o - %s 2>&1 | FileCheck %s --check-prefix=NODUMP
-
-# REQUIRES: asserts
----
-name: f
-tracksRegLiveness: true
-body: |
- bb.0:
- liveins: $x0, $x1, $x2
- $x3 = ADDXrr $x0, $x0
- $x4 = ADDXrr $x1, $x1
- $x5 = ADDXrr $x2, $x2
-
-# It is enough to check the last one of the printout of the state of
-# the schedule boundary, just before the final schedule is printed.
-
-# CHECK-LABEL: Ready @1c
-# CHECK-NEXT: CortexA55UnitALU +1x1u
-# CHECK-NEXT: BotQ.A @1c
-# CHECK-NEXT: Retired: 3
-# CHECK-NEXT: Executed: 1c
-# CHECK-NEXT: Critical: 1c, 3 MOps
-# CHECK-NEXT: ExpectedLatency: 0c
-# CHECK-NEXT: - Latency limited.
-# CHECK-NEXT: CortexA55UnitALU(0) = 1
-# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
-# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
-# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
-# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
-# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
-# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
-# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
-# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
-# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
-# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
-# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
-# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
-# CHECK-NEXT: *** Final schedule for %bb.0 ***
-# CHECK-NEXT: SU(0): $x3 = ADDXrr $x0, $x0
-# CHECK-NEXT: SU(1): $x4 = ADDXrr $x1, $x1
-# CHECK-NEXT: SU(2): $x5 = ADDXrr $x2, $x2
-
-# NODUMP-LABEL: Ready @1c
-# NODUMP-NEXT: CortexA55UnitALU +1x1u
-# NODUMP-NEXT: BotQ.A @1c
-# NODUMP-NEXT: Retired: 3
-# NODUMP-NEXT: Executed: 1c
-# NODUMP-NEXT: Critical: 1c, 3 MOps
-# NODUMP-NEXT: ExpectedLatency: 0c
-# NODUMP-NEXT: - Latency limited.
-# NODUMP-NEXT: ** ScheduleDAGMILive::schedule picking next node
-# NODUMP-NEXT: *** Final schedule for %bb.0 ***
-# NODUMP-NEXT: SU(0): $x3 = ADDXrr $x0, $x0
-# NODUMP-NEXT: SU(1): $x4 = ADDXrr $x1, $x1
-# NODUMP-NEXT: SU(2): $x5 = ADDXrr $x2, $x2
-
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