[PATCH] D141666: [RISCV] Proper support of extensions Zicsr and Zifencei

[Elena Lepilkina via Phabricator via llvm-commits]

eklepilkina created this revision.
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Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D141666

Files:
  clang/lib/Driver/ToolChains/Arch/RISCV.cpp
  clang/lib/Driver/ToolChains/BareMetal.cpp
  clang/lib/Driver/ToolChains/Gnu.cpp
  clang/test/Driver/baremetal.cpp
  clang/test/Driver/riscv-default-features.c
  clang/test/Driver/riscv-gnutools.c
  llvm/lib/Support/RISCVISAInfo.cpp
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/test/CodeGen/RISCV/attributes.ll
  llvm/test/CodeGen/RISCV/get-register-noreserve.ll
  llvm/test/CodeGen/RISCV/readcyclecounter.ll
  llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir
  llvm/test/CodeGen/RISCV/rvv/scalar-stack-align.ll
  llvm/test/CodeGen/RISCV/rvv/vscale-power-of-two.ll
  llvm/test/CodeGen/RISCV/rvv/zvlsseg-zero-vl.ll
  llvm/test/CodeGen/RISCV/vlenb.ll
  llvm/test/MC/RISCV/Ztso.s
  llvm/test/MC/RISCV/csr-aliases.s
  llvm/test/MC/RISCV/deprecated-csr-names.s
  llvm/test/MC/RISCV/hypervisor-csr-names.s
  llvm/test/MC/RISCV/machine-csr-names.s
  llvm/test/MC/RISCV/rv32-hypervisor-csr-names.s
  llvm/test/MC/RISCV/rv32-machine-csr-names.s
  llvm/test/MC/RISCV/rv32-supervisor-csr-names.s
  llvm/test/MC/RISCV/rv32-user-csr-names.s
  llvm/test/MC/RISCV/rv32e-valid.s
  llvm/test/MC/RISCV/rv32i-aliases-valid.s
  llvm/test/MC/RISCV/rv32i-invalid.s
  llvm/test/MC/RISCV/rv32i-valid.s
  llvm/test/MC/RISCV/rv64-machine-csr-names.s
  llvm/test/MC/RISCV/rv64-user-csr-names.s
  llvm/test/MC/RISCV/rvf-user-csr-names.s
  llvm/test/MC/RISCV/rvi-aliases-valid.s
  llvm/test/MC/RISCV/rvk-user-csr-name.s
  llvm/test/MC/RISCV/supervisor-csr-names.s
  llvm/test/MC/RISCV/user-csr-names.s

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