[PATCH] D139706: [RISCV][VP] expand vp intrinsics if no +zve32x feature

Yingchi Long via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 12 22:48:14 PST 2023


This revision was automatically updated to reflect the committed changes.
Closed by commit rG6c09a4e5ba2e: [RISCV][VP] expand vp intrinsics if no +zve32x feature (authored by inclyc).

Changed prior to commit:
  https://reviews.llvm.org/D139706?vs=484550&id=488869#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139706/new/

https://reviews.llvm.org/D139706

Files:
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
  llvm/test/CodeGen/RISCV/rvv/expand-no-v.ll

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