[PATCH] D141128: AMDGPU/GlobalISel: Make regbankselect of implicit_def consistent with constants

Thu Jan 12 19:52:24 PST 2023

arsenm closed this revision.
arsenm added a comment.

371884865393141b0216b6479260b6feef5915ee <https://reviews.llvm.org/rG371884865393141b0216b6479260b6feef5915ee>

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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-implicit-def.mir:135-137
+    ; CHECK-NEXT: [[DEF:%[0-9]+]]:sgpr(s32) = G_IMPLICIT_DEF
+    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[DEF]](s32)
+    ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:sgpr(s32) = G_ZEXT [[TRUNC]](s1)
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Pierre-vh wrote:
> arsenm wrote:
> > foad wrote:
> > > Patch looks reasonable but I don't understand why it has this effect.
> > Previously the widen to s32 was applied to the select input, now it's being applied to the implicit_def's output too, so you get both. We currently don't try to fold out intermediate states
> This will be folded by the next combine run before instruction select right?
Hopefully, but regbank combine hasn't seen much work

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  https://reviews.llvm.org/D141128/new/

https://reviews.llvm.org/D141128