[PATCH] D141599: [RISCV] Generalize performFP_TO_INTCombine to vectors

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:9513
+
+  if (VT.isVector()) {
+    MVT SrcVT = Src.getSimpleValueType();
----------------
You're only handling f16->i16 f32->i32 and f64->i64, but you didn't check that the integer size is the same as FP.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:9516
+    MVT SrcContainerVT = SrcVT;
+    MVT ContainerVT = VT.getSimpleVT();
+    SDValue XVal = Src.getOperand(0);
----------------
Need to check that VT is a legal type.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141599/new/

https://reviews.llvm.org/D141599