[PATCH] D138323: [TableGen] RegisterInfo backend - Add abstraction layer between code generation logic and syntax output
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 12 09:13:24 PST 2023
arsenm added inline comments.
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Comment at: llvm/utils/TableGen/Printer.h:74
+ for (unsigned I = Count; I > 0; --I)
+ OS << "\n";
+ }
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Single quotes
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Comment at: llvm/utils/TableGen/Printer.h:100
+ virtual void regInfoEmitSubRegIdxLists(
+ std::string const TargetName,
+ SequenceToOffsetTable<SubRegIdxVec, deref<std::less<>>> const
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Should use StringRef for all these const string parameters
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Comment at: llvm/utils/TableGen/PrinterLLVM.cpp:1419
+ OS << " return BaseClasses[Mapping[Reg]];\n";
+ OS << "}\n";
+}
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Don't need a separate OS << on each line, can just break the one literal across multiple lines
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D138323/new/
https://reviews.llvm.org/D138323
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