[PATCH] D141129: [InstCombine] Use KnownBits for lshr/add -> (a + b < a)

[Sanjay Patel via Phabricator via llvm-commits]

spatel added inline comments.


================
Comment at: llvm/test/Transforms/InstCombine/shift-add.ll:510
+
+define i32 @lshr_16_add_known_17_leading_zeroes(i32 %a, i32 %b) {
+; CHECK-LABEL: @lshr_16_add_known_17_leading_zeroes(
----------------
Demanded bits should always zap cases like this.
A more interesting test would have just one side of the add with extra leading zeros:
https://alive2.llvm.org/ce/z/c4_YAE

So we'd be back to creating 2 extra instructions vs. the original sequence. That doesn't seem like a good trade-off in IR.


================
Comment at: llvm/test/Transforms/InstCombine/shift-add.ll:530
   %a16 = and i32 %a, 131071 ; 0x1FFFF
   %b16 = and i32 %b, 65535 ; 0x65535
   %add = add i32 %a16, %b16
----------------
wrong hex value comment - 0xFFFF


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141129/new/

https://reviews.llvm.org/D141129