[llvm] d6ab9ca - [RISCV] Add zvl65536b to the target feature list

[Kito Cheng via llvm-commits]

Author: Kito Cheng
Date: 2023-01-12T23:51:46+08:00
New Revision: d6ab9cae4b689b51ad2c62ff5adce8e8f11c527b

URL: https://github.com/llvm/llvm-project/commit/d6ab9cae4b689b51ad2c62ff5adce8e8f11c527b
DIFF: https://github.com/llvm/llvm-project/commit/d6ab9cae4b689b51ad2c62ff5adce8e8f11c527b.diff

LOG: [RISCV] Add zvl65536b to the target feature list

We have zvl65536b listed in RISCVISAInfo.cpp, but we don't have
corresponding target feature in td file.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D141484

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCV.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCV.td b/llvm/lib/Target/RISCV/RISCV.td
index 1f785323f5b40..5551a4a6497ca 100644
--- a/llvm/lib/Target/RISCV/RISCV.td
+++ b/llvm/lib/Target/RISCV/RISCV.td
@@ -331,7 +331,7 @@ def HasRVCHints : Predicate<"Subtarget->enableRVCHintInstrs()">,
 def FeatureStdExtZvl32b : SubtargetFeature<"zvl32b", "ZvlLen", "32",
                                            "'Zvl' (Minimum Vector Length) 32">;
 
-foreach i = { 6-15 } in {
+foreach i = { 6-16 } in {
   defvar I = !shl(1, i);
   def FeatureStdExtZvl#I#b :
       SubtargetFeature<"zvl"#I#"b", "ZvlLen", !cast<string>(I),