[PATCH] D141606: [AArch64] Remove AES, SHA2, SHA3 and SM4 features from armv8.6-a+

[Dave Green via Phabricator via llvm-commits]

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The Armv8.6-a and later architecture definitions included AES, SHA2, SHA3 and SM4, but this did not have an effect when specifying -march=armv8.6-a. The did not set preprocessor features (https://godbolt.org/z/1YKad6M8e) or enable the relevant instructions (like eor3 from sha3: https://godbolt.org/z/vY9v4MqvG). I believe this was working as intended.

After D141411 <https://reviews.llvm.org/D141411> we now add the default features for architectures, which has had the effect of enabling crypto when -march=armv8.6-a is used. This patch removed those crypto features again, going back to how things were before.

The -mcpu=ampere1 cpu is the only armv8.6+ cpu at present. For that, the AES, SHA2 and SHA3 features have been re-added to the CPU definition to keep it in-line with the gcc definition from https://github.com/gcc-mirror/gcc/commit/db2f5d661239737157cf131de7d4df1c17d8d88d.


https://reviews.llvm.org/D141606

Files:
  clang/test/CodeGen/aarch64-targetattr.c
  clang/test/Preprocessor/aarch64-target-features.c
  llvm/include/llvm/TargetParser/AArch64TargetParser.def
  llvm/unittests/TargetParser/TargetParserTest.cpp

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