[llvm] 6cc9efa - [RISCV] Use ISD::EXTRACT_VECTOR_ELT for Intrinsic::riscv_vfmv_f_s lowering.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 11 18:46:46 PST 2023


Author: Craig Topper
Date: 2023-01-11T18:46:14-08:00
New Revision: 6cc9efae44d457910be76093d09c7a23eaf89247

URL: https://github.com/llvm/llvm-project/commit/6cc9efae44d457910be76093d09c7a23eaf89247
DIFF: https://github.com/llvm/llvm-project/commit/6cc9efae44d457910be76093d09c7a23eaf89247.diff

LOG: [RISCV] Use ISD::EXTRACT_VECTOR_ELT for Intrinsic::riscv_vfmv_f_s lowering.

This matches what we do for extractelt from IR for both fixed and
scalable vectors.

This lets us remove a few isel patterns.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 4424292f783d..74c4bba72ee9 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -5590,6 +5590,9 @@ SDValue RISCVTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
     assert(Op.getValueType() == XLenVT && "Unexpected VT!");
     return DAG.getNode(RISCVISD::VMV_X_S, DL, Op.getValueType(),
                        Op.getOperand(1));
+  case Intrinsic::riscv_vfmv_f_s:
+    return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, Op.getValueType(),
+                       Op.getOperand(1), DAG.getConstant(0, DL, XLenVT));
   case Intrinsic::riscv_vmv_v_x:
     return lowerScalarSplat(Op.getOperand(1), Op.getOperand(2),
                             Op.getOperand(3), Op.getSimpleValueType(), DL, DAG,

diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
index 06e18b0fce6a..291fdd93f053 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
@@ -6264,11 +6264,6 @@ foreach vti = AllIntegerVectors in {
 
 let Predicates = [HasVInstructionsAnyF] in {
 foreach fvti = AllFloatVectors in {
-  defvar instr = !cast<Instruction>("PseudoVFMV_"#fvti.ScalarSuffix#"_S_" #
-                                    fvti.LMul.MX);
-  def : Pat<(fvti.Scalar (int_riscv_vfmv_f_s (fvti.Vector fvti.RegClass:$rs2))),
-                         (instr $rs2, fvti.Log2SEW)>;
-
   def : Pat<(fvti.Vector (int_riscv_vfmv_s_f (fvti.Vector fvti.RegClass:$rs1),
                          (fvti.Scalar fvti.ScalarRegClass:$rs2), VLOpFrag)),
             (!cast<Instruction>("PseudoVFMV_S_"#fvti.ScalarSuffix#"_" #

diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
index 7f033e1510f1..aec02162a2fd 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
@@ -1040,8 +1040,6 @@ foreach vti = AllFloatVectors in {
 
   let AddedComplexity = 2 in {
   // Add complexity to increase the priority of this pattern being matched.
-  def : Pat<(store (vti.Scalar (int_riscv_vfmv_f_s (vti.Vector vti.RegClass:$rs2))), GPR:$rs1),
-            (store_instr vti.RegClass:$rs2, GPR:$rs1, 1, vti.Log2SEW)>;
   def : Pat<(store (extractelt (vti.Vector vti.RegClass:$rs2), 0), GPR:$rs1),
             (store_instr vti.RegClass:$rs2, GPR:$rs1, 1, vti.Log2SEW)>;
   }


        


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