[PATCH] D141464: [X86]: Match (xor TSize - 1, ctlz) to `bsr` instead of `lzcnt` + `xor`

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:51912
+
+  if (C->getAPIntValue() != uint64_t(OpCTLZ.getValueSizeInBits() - 1))
+    return SDValue();
----------------
You can use C->getZExtValue() since we know the VT is 64-bits or less.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141464/new/

https://reviews.llvm.org/D141464