[PATCH] D141043: [AArch64][SVE] Avoid AND operation if both side are splat of i1 or PTRUE

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen accepted this revision.
sdesmalen added a comment.
This revision is now accepted and ready to land.

LGTM with comment on the test addressed!



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Comment at: llvm/test/CodeGen/AArch64/sve-splat-one-and-ptrue.ll:36
+; Ensure that one AND operation remain for inactive lanes zeroing with 2 x i1 type (llvm.aarch64.sve.convert.to.svbool.nxv2i1).
+define <vscale x 16 x i1> @foo() #0 {
+; CHECK-LABEL: foo:
----------------
Can you give `@foo` and `@bar` some more meaningful names as well?


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https://reviews.llvm.org/D141043