[PATCH] D137517: [TargetParser] Generate the defs for RISCV CPUs using llvm-tblgen.

Wed Jan 11 02:26:25 PST 2023

fpetrogalli added a comment.

In D137517#4042758 <https://reviews.llvm.org/D137517#4042758>, @fpetrogalli wrote:

> After submitting this, I had to revert it <https://github.com/llvm/llvm-project/commit/8bd65e535fb33bc48805bafed8217b16a853e158> because of failures like https://lab.llvm.org/buildbot/#/builders/225/builds/12367/steps/5/logs/stdio

I have resubmitted with what I hope is the right fix (I could not reproduce any of the failures I was seeing in buildbot, on my machine the build is fine).

The new commit is at https://github.com/llvm/llvm-project/commit/ac1ffd3caca12c254e0b8c847aa8ce8e51b6cfbf - in the commit message I have explained what I have changed WRT this original patch. I have added  the
tablegen target `RISCVTargetParserTableGen` in the `DEPENDS` list of `clangDriver` and `clangBasic`. This makes sure that the `.*inc` file with theist o the CPU is available even if `LLVMTargetParser` has not been built yet.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137517/new/

https://reviews.llvm.org/D137517