[PATCH] D141473: [PowerPC] Only optimize store of fptoint for single used
Qiu Chaofan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 11 02:14:52 PST 2023
qiucf created this revision.
qiucf added reviewers: nemanjai, shchenz, lei, PowerPC.
Herald added subscribers: kbarton, hiraditya.
Herald added a project: All.
qiucf requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D141473
Files:
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/test/CodeGen/PowerPC/store_fptoi.ll
Index: llvm/test/CodeGen/PowerPC/store_fptoi.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/store_fptoi.ll
+++ llvm/test/CodeGen/PowerPC/store_fptoi.ll
@@ -1023,22 +1023,20 @@
define void @multiple_store(double %m, ptr %addr1, ptr %addr2, ptr %addr3) {
; CHECK-LABEL: multiple_store:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xscvdpsxds 2, 1
-; CHECK-NEXT: stxsd 2, 0(4)
-; CHECK-NEXT: xscvdpsxds 2, 1
-; CHECK-NEXT: stxsd 2, 0(5)
-; CHECK-NEXT: xscvdpsxds 2, 1
-; CHECK-NEXT: stxsd 2, 0(6)
+; CHECK-NEXT: xscvdpsxds 0, 1
+; CHECK-NEXT: mffprd 3, 0
+; CHECK-NEXT: std 3, 0(4)
+; CHECK-NEXT: std 3, 0(5)
+; CHECK-NEXT: std 3, 0(6)
; CHECK-NEXT: blr
;
; CHECK-PWR8-LABEL: multiple_store:
; CHECK-PWR8: # %bb.0: # %entry
; CHECK-PWR8-NEXT: xscvdpsxds 0, 1
-; CHECK-PWR8-NEXT: stxsdx 0, 0, 4
-; CHECK-PWR8-NEXT: xscvdpsxds 0, 1
-; CHECK-PWR8-NEXT: stxsdx 0, 0, 5
-; CHECK-PWR8-NEXT: xscvdpsxds 0, 1
-; CHECK-PWR8-NEXT: stxsdx 0, 0, 6
+; CHECK-PWR8-NEXT: mffprd 3, 0
+; CHECK-PWR8-NEXT: std 3, 0(4)
+; CHECK-PWR8-NEXT: std 3, 0(5)
+; CHECK-PWR8-NEXT: std 3, 0(6)
; CHECK-PWR8-NEXT: blr
entry:
%conv1 = fptosi double %m to i64
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -15323,8 +15323,9 @@
EVT Op1VT = N->getOperand(1).getValueType();
unsigned Opcode = N->getOperand(1).getOpcode();
- if (Opcode == ISD::FP_TO_SINT || Opcode == ISD::FP_TO_UINT) {
- SDValue Val= combineStoreFPToInt(N, DCI);
+ if ((Opcode == ISD::FP_TO_SINT || Opcode == ISD::FP_TO_UINT) &&
+ N->getOperand(1).hasOneUse()) {
+ SDValue Val = combineStoreFPToInt(N, DCI);
if (Val)
return Val;
}
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