[PATCH] D141464: [X86]: Match (xor TSize - 1, ctlz) to `bsr` instead of `lzcnt` + `xor`

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/X86/X86InstrCompiler.td:2254
+// emitting extra xor + lzcnt.
+def : Pat<(xor (ctlz GR16:$src), 15), (BSR16rr GR16:$src)>;
+def : Pat<(xor (ctlz GR32:$src), 31), (BSR32rr GR32:$src)>;
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This doesn't produce the correct value for $src being 0. The ctlz would return 16 and the xor would turn that to 31. BSR16rr will produce an undefined value.

I think this is only valid for the zero_undef nodes.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141464/new/

https://reviews.llvm.org/D141464