[PATCH] D140782: [RISCV] Teach lowerCTLZ_CTTZ_ZERO_UNDEF to handle conversion i32/i64 vectors to f32 vectors.
Yeting Kuo via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 11 00:29:58 PST 2023
fakepaper56 marked 4 inline comments as done.
fakepaper56 added inline comments.
================
Comment at: llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll:1092
+; CHECK-F-NEXT: vsetvli a0, zero, e32, m1, ta, ma
+; CHECK-F-NEXT: vmset.m v0
+; CHECK-F-NEXT: fsrmi a0, 1
----------------
craig.topper wrote:
> Any idea where this vmset came from?
The `PseudoVFCVT_RM_F_XU_V_<LMUL>_MASK` does not have unmask version now. I think there are same issues about other RM conversion.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D140782/new/
https://reviews.llvm.org/D140782
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