[PATCH] D141419: [DAGCombine] Suppress some foldings of rounding to fp16

[Warren Ristow via Phabricator via llvm-commits]

wristow created this revision.
wristow added reviewers: RKSimon, spatel, nlopes, efriedma.
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Folding of 'x86_fp80 -> float -> half' into a direct rounding of
'x86_fp80 -> half' is legal when "unsafe-fp-math" is true, but it has
been suppressed for efficiency reasons because it generally results in
a run-time call rather than native instructions.  The same applies for
vector versions, but those foldings have not been suppressed.  The same
efficiency aspect applies to folding of 'double -> float -> half', but
those foldings have not been suppressed (scalar or vector).

This patch suppresses the foldings for the 'double' source (scalar and
vector), and for the vector version of 'x86_fp80' (to match the scalar
approach).


https://reviews.llvm.org/D141419

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll

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