[PATCH] D141289: [MIScheduler] Print top/down cycle in the SUnit dump.

[Florian Hahn via Phabricator via llvm-commits]

fhahn added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/sched-print-cycle.mir:18
+# CHECK-LABEL: *** Final schedule for %bb.0 ***
+# CHECK: SU(0 {{[0-9]+}} {{[0-9]+}}):   $x1 = ADDXrr $x0, $x0
+# CHECK: SU(1 {{[0-9]+}} {{[0-9]+}}):   $x2 = ADDXrr $x1, $x1
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Should this not check for the expected cycles?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141289/new/

https://reviews.llvm.org/D141289