[PATCH] D141387: [DebugInfo] Make instr-ref/DBG_VALUE mode of a MachineFunction

Tue Jan 10 07:24:08 PST 2023

jmorse created this revision.
jmorse added reviewers: Orlando, StephenTozer.
Herald added subscribers: pengfei, hiraditya, qcolombet, MatzeB.
Herald added a project: All.
jmorse requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Currently, CodeGen passes like LiveDebugValues work out whether DBG_INSTR_REF or DBG_VALUE instructions are being used for variable locations by examining the current optimisation level, and other attributes of the function. The assumption is that, by examining the function and optimisation level, you can work out later which flavour was used. Unfortunately this isn't always true, as reported in https://github.com/llvm/llvm-project/issues/57997 , things like opt-bisect-limit break this assumption because the optimisation level can change. When it does, the result is usually assertion failures.

To fix this, make "instruction referencing" an attribute of a MachineFunction -- it's simplest to just store whether or not the function was generated with DBG_INSTR_REF or not, and use that flag as the source-of-truth, rather than try to hack around this any further. This patch adds that flag to the MachineFunction (and MIR) parser, and adds the flag to the existing instruction referencing tests. As a result of this, we can un-plumb some flags out of SelectionDAG/FastISel that effectively implement the same thing. It still makes sense for InstrEmitter to hold a local copy of the are-we-using-instr-ref-flag as it checks it quite frequently.

The test changes are unremarkable; however this change means we can't feed the same MIR into both flavours of LiveDebugValues and expect to get legitimate outputs. As a result, I've duplicated three tests, to have instr-ref and DBG_VALUE versions:

- entry-value-of-modified-param.mir
- kill-entry-value-after-diamond-bbs.mir
- live-debug-values-bad-transfer.mir

Additionally there are two tests where I've just deleted the RUN lines for DBG_VALUE-behaviours and not duplicated the test:

- single-assign-propagation.mir: this test is checking that a performance-optimisation in InstrRefBasedLDV actually behaves correctly, there's nothing interesting about the way it passes through VarLocsBasedLDV. The DBG_VALUE-based check lines were only in there to provide a comparison with how VarLocBasedLDV behaved, I don't believe we actually need to be testing them.
- stack-coloring-dbg-phi.mir: this test exists because stack coloring changed codegen when it saw DBG_PHI instructions, it doesn't actually need a DBG_VALUE run line.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D141387

Files:
  llvm/include/llvm/CodeGen/FastISel.h
  llvm/include/llvm/CodeGen/MIRYamlMapping.h
  llvm/include/llvm/CodeGen/MachineFunction.h
  llvm/include/llvm/CodeGen/SelectionDAG.h
  llvm/include/llvm/CodeGen/SelectionDAGISel.h
  llvm/lib/CodeGen/MIRParser/MIRParser.cpp
  llvm/lib/CodeGen/MIRPrinter.cpp
  llvm/lib/CodeGen/MachineFunction.cpp
  llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
  llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
  llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  llvm/test/CodeGen/X86/dbg-value-superreg-copy2.mir
  llvm/test/DebugInfo/MIR/InstrRef/accept-nonlive-reg-phis.mir
  llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir
  llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir
  llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv2.mir
  llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir
  llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir
  llvm/test/DebugInfo/MIR/InstrRef/deref-spills-with-size.mir
  llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-indir-value.mir
  llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
  llvm/test/DebugInfo/MIR/InstrRef/instr-ref-roundtrip.mir
  llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir
  llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir
  llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_recover_clobbers.mir
  llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir
  llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir
  llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir
  llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding.mir
  llvm/test/DebugInfo/MIR/InstrRef/memory-operand-load-folding.mir
  llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir
  llvm/test/DebugInfo/MIR/InstrRef/no-duplicates.mir
  llvm/test/DebugInfo/MIR/InstrRef/no-metainstrs.mir
  llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced2.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-regallocd-to-stack.mir
  llvm/test/DebugInfo/MIR/InstrRef/phi-through-regalloc.mir
  llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir
  llvm/test/DebugInfo/MIR/InstrRef/restore-clobber-with-indirectness.mir
  llvm/test/DebugInfo/MIR/InstrRef/restore-to-rsp-crash.mir
  llvm/test/DebugInfo/MIR/InstrRef/single-assign-propagation.mir
  llvm/test/DebugInfo/MIR/InstrRef/spill-slot-limits.mir
  llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir
  llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir
  llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir
  llvm/test/DebugInfo/MIR/InstrRef/twoaddr-to-threeaddr-sub.mir
  llvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir
  llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir
  llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir
  llvm/test/DebugInfo/MIR/InstrRef/x86-fp-stackifier-drop-locations.mir
  llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir
  llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir
  llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir
  llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param2.mir
  llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir
  llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir
  llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs2.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer2.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values-stack-clobber.mir
  llvm/test/DebugInfo/MIR/X86/livedebugvalues_load_in_loop.mir
  llvm/test/DebugInfo/X86/instr-ref-track-clobbers.mir

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