[PATCH] D141379: [AMDGPU] Temporarily disable FeatureBackOffBarrier for GFX11

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
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Enabling this feature exposed some incorrect codegen, where a workgroup-
scope barrier fails to properly synchronise two waves from the same
workgroup running on different SIMDs of the same CU.

Disabling FeatureBackOffBarrier causes an s_waitcnt to be emitted before
the barrier which works around the problem.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D141379

Files:
  llvm/lib/Target/AMDGPU/AMDGPU.td
  llvm/test/CodeGen/AMDGPU/back-off-barrier-subtarget-feature.ll
  llvm/test/CodeGen/AMDGPU/waitcnt-preexisting-vscnt.mir


Index: llvm/test/CodeGen/AMDGPU/waitcnt-preexisting-vscnt.mir
===================================================================
--- llvm/test/CodeGen/AMDGPU/waitcnt-preexisting-vscnt.mir
+++ llvm/test/CodeGen/AMDGPU/waitcnt-preexisting-vscnt.mir
@@ -64,7 +64,7 @@
     ; GFX11-NEXT: S_WAITCNT 0
     ; GFX11-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
     ; GFX11-NEXT: GLOBAL_STORE_DWORD $vgpr0_vgpr1, $vgpr2, 0, 0, implicit $exec
-    ; GFX11-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 1
+    ; GFX11-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
     ; GFX11-NEXT: S_BARRIER
     ; GFX11-NEXT: $vgpr0 = FLAT_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr
     ; GFX11-NEXT: S_WAITCNT 7
@@ -185,7 +185,7 @@
     ; GFX11-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
     ; GFX11-NEXT: GLOBAL_STORE_DWORD $vgpr0_vgpr1, $vgpr2, 0, 0, implicit $exec
     ; GFX11-NEXT: S_WAITCNT 0
-    ; GFX11-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 1
+    ; GFX11-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
     ; GFX11-NEXT: S_BARRIER
     ; GFX11-NEXT: $vgpr0 = FLAT_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr
     ; GFX11-NEXT: S_WAITCNT 7
Index: llvm/test/CodeGen/AMDGPU/back-off-barrier-subtarget-feature.ll
===================================================================
--- llvm/test/CodeGen/AMDGPU/back-off-barrier-subtarget-feature.ll
+++ llvm/test/CodeGen/AMDGPU/back-off-barrier-subtarget-feature.ll
@@ -47,8 +47,8 @@
 ; GFX11-BACKOFF-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
 ; GFX11-BACKOFF-NEXT:    s_waitcnt_vscnt null, 0x0
 ; GFX11-BACKOFF-NEXT:    flat_load_b32 v0, v[0:1]
-; GFX11-BACKOFF-NEXT:    s_barrier
 ; GFX11-BACKOFF-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
+; GFX11-BACKOFF-NEXT:    s_barrier
 ; GFX11-BACKOFF-NEXT:    flat_store_b32 v[2:3], v0
 ; GFX11-BACKOFF-NEXT:    s_waitcnt lgkmcnt(0)
 ; GFX11-BACKOFF-NEXT:    s_waitcnt_vscnt null, 0x0
Index: llvm/lib/Target/AMDGPU/AMDGPU.td
===================================================================
--- llvm/lib/Target/AMDGPU/AMDGPU.td
+++ llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -1312,7 +1312,6 @@
    FeaturePackedTID,
    FeatureVcmpxPermlaneHazard,
    FeatureVALUTransUseHazard,
-   FeatureBackOffBarrier,
    FeatureMADIntraFwdBug]>;
 
 def FeatureISAVersion11_0_0 : FeatureSet<


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