[PATCH] D141301: [AMDGPU][AsmParser][NFC] Refine defining single-bit custom operands.

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

dp added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.td:1169
 
-class CustomOperand<ValueType Type, bit Optional = 0, string Name = NAME,
-    AsmOperandClass Class = CustomOperandClass<Name, Optional>>
-    : Operand<Type> {
-  let PrintMethod = "print"#Name;
-  let ParserMatchClass = Class;
-  let OperandType = "OPERAND_IMMEDIATE";
+class CustomOperandMixin<bit Optional = 0, string Name = NAME,
+    AsmOperandClass Class = CustomOperandClass<Name, Optional>> {
----------------
"Mixin" is an abstraction which does not explain the purpose of this class. Maybe CustomOperandProps would be a better name? 


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.td:1204
+
+class DefaultOperand_0<CustomOperandMixin Op>
+  : OperandWithDefaultOps<i1, (ops (i1 0))>,
----------------
This currently works with named bit operands only, correct? Would it be possible to extract the type from `Op` to avoid hardcoded `i1`?


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.td:1286
 def bank_mask : NamedOperandU32<"BankMask", NamedMatchClass<"BankMask">>;
-def bound_ctrl : NamedOperandBit<"BoundCtrl", NamedMatchClass<"BoundCtrl">>;
+def bound_ctrl : NamedOperand<i1, "bound_ctrl", "DppBoundCtrl", "ConvertBoundCtrl">;
 def FI : NamedOperandU32<"FI", NamedMatchClass<"FI">>;
----------------
Maybe ConvertDppBoundCtrl?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141301/new/

https://reviews.llvm.org/D141301