[llvm] 4c6d6fc - [AVR] Do not select unimplemented pseudo instructions

[Ben Shi via llvm-commits]

Author: Ben Shi
Date: 2023-01-10T16:51:46+08:00
New Revision: 4c6d6fc176a115d196194c6d5091d3279d27fffa

URL: https://github.com/llvm/llvm-project/commit/4c6d6fc176a115d196194c6d5091d3279d27fffa
DIFF: https://github.com/llvm/llvm-project/commit/4c6d6fc176a115d196194c6d5091d3279d27fffa.diff

LOG: [AVR] Do not select unimplemented pseudo instructions

Reviewed By: aykevl, Miss_Grape

Differential Revision: https://reviews.llvm.org/D141210

Added: 
    

Modified: 
    llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
    llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp b/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
index f471e72b8f06f..2c97dea0bce03 100644
--- a/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
@@ -888,7 +888,7 @@ bool AVRExpandPseudo::expand<AVR::LPMWRdZPi>(Block &MBB, BlockIt MBBI) {
 
 template <>
 bool AVRExpandPseudo::expand<AVR::ELPMBRdZPi>(Block &MBB, BlockIt MBBI) {
-  llvm_unreachable("byte ELPMPi is unimplemented");
+  llvm_unreachable("8-bit ELPMPi is unimplemented");
 }
 
 template <>

diff  --git a/llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp b/llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
index 67b822a2bfb34..36d2e8cb48d30 100644
--- a/llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
@@ -188,18 +188,13 @@ unsigned AVRDAGToDAGISel::selectIndexedProgMemLoad(const LoadSDNode *LD, MVT VT,
   unsigned Opcode = 0;
   int Offs = cast<ConstantSDNode>(LD->getOffset())->getSExtValue();
 
-  switch (VT.SimpleTy) {
-  case MVT::i8:
-    if (Offs == 1)
-      Opcode = Bank > 0 ? AVR::ELPMBRdZPi : AVR::LPMRdZPi;
-    break;
-  case MVT::i16:
-    if (Offs == 2)
-      Opcode = Bank > 0 ? AVR::ELPMWRdZPi : AVR::LPMWRdZPi;
-    break;
-  default:
-    break;
-  }
+  if (VT.SimpleTy == MVT::i8 && Offs == 1 && Bank == 0)
+    Opcode = AVR::LPMRdZPi;
+
+  // TODO: Implements the expansion of the following pseudo instructions.
+  // LPMWRdZPi:  type == MVT::i16, offset == 2, Bank == 0.
+  // ELPMBRdZPi: type == MVT::i8,  offset == 1, Bank >  0.
+  // ELPMWRdZPi: type == MVT::i16, offset == 2, Bank >  0.
 
   return Opcode;
 }