[PATCH] D141329: [AMDGPU] Can sub-dword elements to i32 in concat_vectors

[Matt Arsenault via Phabricator via llvm-commits]

arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.

Commit message? Can?



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Comment at: llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll:2315
   ret void
 }
 
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Not sure we'll reach here with i8 vectors


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  https://reviews.llvm.org/D141329/new/

https://reviews.llvm.org/D141329