[PATCH] D141311: [RISCV] Avoid emitting hardware fences for singlethread fences

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:1849
+let hasSideEffects = 1, isMeta = 1 in
+def Int_MemBarrier : Pseudo<(outs), (ins),
+                     [(RISCVMemBarrier)]>;
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This isn't standard naming for pseudos, but maybe other backends do it this way too?...


Repository:
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  https://reviews.llvm.org/D141311/new/

https://reviews.llvm.org/D141311