[llvm] 6a6f62a - [AMDGPU] S_MULK_I32 does not define SCC. NFCI.

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2023-01-09T15:44:56Z
New Revision: 6a6f62a719b9e312133df2768b2e2d7d0b68b76f

URL: https://github.com/llvm/llvm-project/commit/6a6f62a719b9e312133df2768b2e2d7d0b68b76f
DIFF: https://github.com/llvm/llvm-project/commit/6a6f62a719b9e312133df2768b2e2d7d0b68b76f.diff

LOG: [AMDGPU] S_MULK_I32 does not define SCC. NFCI.

Differential Revision: https://reviews.llvm.org/D141281

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SOPInstructions.td

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SOPInstructions.td b/llvm/lib/Target/AMDGPU/SOPInstructions.td
index ed4dc5481ce8d..ad9af662307f2 100644
--- a/llvm/lib/Target/AMDGPU/SOPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td
@@ -865,9 +865,10 @@ def S_CMPK_LE_U32 : SOPK_SCC <"s_cmpk_le_u32", "s_cmp_le_u32", 0>;
 } // End SOPKZext = 1
 } // End isCompare = 1
 
-let Defs = [SCC], isCommutable = 1, DisableEncoding = "$src0",
+let isCommutable = 1, DisableEncoding = "$src0",
     Constraints = "$sdst = $src0" in {
-  def S_ADDK_I32 : SOPK_32TIE <"s_addk_i32">;
+  let Defs = [SCC] in
+    def S_ADDK_I32 : SOPK_32TIE <"s_addk_i32">;
   def S_MULK_I32 : SOPK_32TIE <"s_mulk_i32">;
 }