[llvm] 33794cf - [InstCombine] Fold logic-and/logic-or by distributive laws part2
via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 8 18:21:24 PST 2023
Author: chenglin.bi
Date: 2023-01-09T10:21:17+08:00
New Revision: 33794cffcfdadfffda2c78c73a25ce6fc58596f0
URL: https://github.com/llvm/llvm-project/commit/33794cffcfdadfffda2c78c73a25ce6fc58596f0
DIFF: https://github.com/llvm/llvm-project/commit/33794cffcfdadfffda2c78c73a25ce6fc58596f0.diff
LOG: [InstCombine] Fold logic-and/logic-or by distributive laws part2
Follow up https://reviews.llvm.org/D139408, support `and/or+select` patterns
X && Z || Y && Z --> (X || Y) && Z
https://alive2.llvm.org/ce/z/EMCkBG
https://alive2.llvm.org/ce/z/Q-YRvr
https://alive2.llvm.org/ce/z/SFkVQc
https://alive2.llvm.org/ce/z/S9MCuJ
https://alive2.llvm.org/ce/z/KZ7zzz
(X || Z) && (Y || Z) --> (X && Y) || Z
https://alive2.llvm.org/ce/z/Ggpa8-
https://alive2.llvm.org/ce/z/nhQRLY
https://alive2.llvm.org/ce/z/zpmEnq
https://alive2.llvm.org/ce/z/7omsrf
https://alive2.llvm.org/ce/z/CWBzBp
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D139630
Added:
Modified:
llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
llvm/test/Transforms/InstCombine/select-factorize.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
index 5ea30560093d5..6fc7051669a92 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -2775,20 +2775,26 @@ Instruction *InstCombinerImpl::foldSelectOfBools(SelectInst &SI) {
(CondVal->hasOneUse() || FalseVal->hasOneUse())) {
bool CondLogicAnd = isa<SelectInst>(CondVal);
bool FalseLogicAnd = isa<SelectInst>(FalseVal);
- if (CondLogicAnd && FalseLogicAnd) {
- // (A ? B : 0) ? 1 : (A ? D : 0) --> A ? (B ? 1 : D) : 0
- if (A == C)
- return SelectInst::Create(A, Builder.CreateSelect(B, One, D), Zero);
- // (A ? B : 0) ? 1 : (C ? A : 0) --> A ? (B ? 1 : C) : 0
- if (A == D)
- return SelectInst::Create(A, Builder.CreateSelect(B, One, C), Zero);
- // (A ? B : 0) ? 1 : (B ? D : 0) --> B ? (A ? 1 : D) : 0
- if (B == C)
- return SelectInst::Create(B, Builder.CreateSelect(A, One, D), Zero);
- // (A ? B : 0) ? 1 : (C ? B : 0) --> (A ? 1 : C) ? B : 0
- if (B == D)
- return SelectInst::Create(Builder.CreateSelect(A, One, C), B, Zero);
- }
+ auto AndFactorization = [&](Value *Common, Value *InnerCond,
+ Value *InnerVal,
+ bool SelFirst = false) -> Instruction * {
+ Value *InnerSel = Builder.CreateSelect(InnerCond, One, InnerVal);
+ if (SelFirst)
+ std::swap(Common, InnerSel);
+ if (FalseLogicAnd || (CondLogicAnd && Common == A))
+ return SelectInst::Create(Common, InnerSel, Zero);
+ else
+ return BinaryOperator::CreateAnd(Common, InnerSel);
+ };
+
+ if (A == C)
+ return AndFactorization(A, B, D);
+ if (A == D)
+ return AndFactorization(A, B, C);
+ if (B == C)
+ return AndFactorization(B, A, D);
+ if (B == D)
+ return AndFactorization(B, A, C, CondLogicAnd && FalseLogicAnd);
}
}
@@ -2810,20 +2816,26 @@ Instruction *InstCombinerImpl::foldSelectOfBools(SelectInst &SI) {
(CondVal->hasOneUse() || TrueVal->hasOneUse())) {
bool CondLogicOr = isa<SelectInst>(CondVal);
bool TrueLogicOr = isa<SelectInst>(TrueVal);
- if (CondLogicOr && TrueLogicOr) {
- // (A ? 1 : B) ? (A ? 1 : D) : 0 --> A ? 1 : (B ? D : 0)
- if (A == C)
- return SelectInst::Create(A, One, Builder.CreateSelect(B, D, Zero));
- // (A ? 1 : B) ? (C ? 1 : A) : 0 --> A ? 1 : (B ? C : 0)
- if (A == D)
- return SelectInst::Create(A, One, Builder.CreateSelect(B, C, Zero));
- // (A ? 1 : B) ? (B ? 1 : D) : 0 --> B ? 1 : (A ? D : 0)
- if (B == C)
- return SelectInst::Create(B, One, Builder.CreateSelect(A, D, Zero));
- // (A ? 1 : B) ? (C ? 1 : B) : 0 --> (A ? C : 0) ? 1 : B
- if (B == D)
- return SelectInst::Create(Builder.CreateSelect(A, C, Zero), One, B);
- }
+ auto OrFactorization = [&](Value *Common, Value *InnerCond,
+ Value *InnerVal,
+ bool SelFirst = false) -> Instruction * {
+ Value *InnerSel = Builder.CreateSelect(InnerCond, InnerVal, Zero);
+ if (SelFirst)
+ std::swap(Common, InnerSel);
+ if (TrueLogicOr || (CondLogicOr && Common == A))
+ return SelectInst::Create(Common, One, InnerSel);
+ else
+ return BinaryOperator::CreateOr(Common, InnerSel);
+ };
+
+ if (A == C)
+ return OrFactorization(A, B, D);
+ if (A == D)
+ return OrFactorization(A, B, C);
+ if (B == C)
+ return OrFactorization(B, A, D);
+ if (B == D)
+ return OrFactorization(B, A, C, CondLogicOr && TrueLogicOr);
}
}
diff --git a/llvm/test/Transforms/InstCombine/select-factorize.ll b/llvm/test/Transforms/InstCombine/select-factorize.ll
index d9233b7aca415..1039fcf7e520a 100644
--- a/llvm/test/Transforms/InstCombine/select-factorize.ll
+++ b/llvm/test/Transforms/InstCombine/select-factorize.ll
@@ -170,9 +170,8 @@ define i1 @logic_and_logic_or_not_one_use(i1 %c, i1 %a, i1 %b) {
define i1 @and_logic_and_logic_or_1(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @and_logic_and_logic_or_1(
-; CHECK-NEXT: [[AC:%.*]] = and i1 [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[AC]], i1 true, i1 [[BC]]
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[A:%.*]], i1 true, i1 [[B:%.*]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[C:%.*]], i1 [[TMP1]], i1 false
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = and i1 %c, %a
@@ -183,9 +182,8 @@ define i1 @and_logic_and_logic_or_1(i1 %c, i1 %a, i1 %b) {
define i1 @and_logic_and_logic_or_2(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @and_logic_and_logic_or_2(
-; CHECK-NEXT: [[AC:%.*]] = and i1 [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select i1 [[B:%.*]], i1 [[C]], i1 false
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[AC]], i1 true, i1 [[BC]]
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[A:%.*]], i1 true, i1 [[B:%.*]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[C:%.*]], i1 [[TMP1]], i1 false
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = and i1 %c, %a
@@ -196,9 +194,8 @@ define i1 @and_logic_and_logic_or_2(i1 %c, i1 %a, i1 %b) {
define i1 @and_logic_and_logic_or_3(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @and_logic_and_logic_or_3(
-; CHECK-NEXT: [[AC:%.*]] = and i1 [[A:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[AC]], i1 true, i1 [[BC]]
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[A:%.*]], i1 true, i1 [[B:%.*]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[C:%.*]], i1 [[TMP1]], i1 false
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = and i1 %a, %c
@@ -209,9 +206,8 @@ define i1 @and_logic_and_logic_or_3(i1 %c, i1 %a, i1 %b) {
define i1 @and_logic_and_logic_or_4(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @and_logic_and_logic_or_4(
-; CHECK-NEXT: [[AC:%.*]] = and i1 [[A:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select i1 [[B:%.*]], i1 [[C]], i1 false
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[AC]], i1 true, i1 [[BC]]
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[A:%.*]], i1 true, i1 [[B:%.*]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[C:%.*]], i1 [[TMP1]], i1 false
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = and i1 %a, %c
@@ -222,9 +218,8 @@ define i1 @and_logic_and_logic_or_4(i1 %c, i1 %a, i1 %b) {
define i1 @and_logic_and_logic_or_5(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @and_logic_and_logic_or_5(
-; CHECK-NEXT: [[AC:%.*]] = and i1 [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[BC]], i1 true, i1 [[AC]]
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[B:%.*]], i1 true, i1 [[A:%.*]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[C:%.*]], i1 [[TMP1]], i1 false
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = and i1 %c, %a
@@ -235,9 +230,8 @@ define i1 @and_logic_and_logic_or_5(i1 %c, i1 %a, i1 %b) {
define i1 @and_logic_and_logic_or_6(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @and_logic_and_logic_or_6(
-; CHECK-NEXT: [[AC:%.*]] = and i1 [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select i1 [[B:%.*]], i1 [[C]], i1 false
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[BC]], i1 true, i1 [[AC]]
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[B:%.*]], i1 true, i1 [[A:%.*]]
+; CHECK-NEXT: [[OR:%.*]] = and i1 [[TMP1]], [[C:%.*]]
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = and i1 %c, %a
@@ -248,9 +242,8 @@ define i1 @and_logic_and_logic_or_6(i1 %c, i1 %a, i1 %b) {
define i1 @and_logic_and_logic_or_7(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @and_logic_and_logic_or_7(
-; CHECK-NEXT: [[AC:%.*]] = and i1 [[A:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[BC]], i1 true, i1 [[AC]]
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[B:%.*]], i1 true, i1 [[A:%.*]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[C:%.*]], i1 [[TMP1]], i1 false
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = and i1 %a, %c
@@ -261,9 +254,8 @@ define i1 @and_logic_and_logic_or_7(i1 %c, i1 %a, i1 %b) {
define i1 @and_logic_and_logic_or_8(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @and_logic_and_logic_or_8(
-; CHECK-NEXT: [[AC:%.*]] = and i1 [[A:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select i1 [[B:%.*]], i1 [[C]], i1 false
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[BC]], i1 true, i1 [[AC]]
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[B:%.*]], i1 true, i1 [[A:%.*]]
+; CHECK-NEXT: [[OR:%.*]] = and i1 [[TMP1]], [[C:%.*]]
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = and i1 %a, %c
@@ -274,9 +266,8 @@ define i1 @and_logic_and_logic_or_8(i1 %c, i1 %a, i1 %b) {
define <3 x i1> @and_logic_and_logic_or_vector(<3 x i1> %c, <3 x i1> %a, <3 x i1> %b) {
; CHECK-LABEL: @and_logic_and_logic_or_vector(
-; CHECK-NEXT: [[AC:%.*]] = and <3 x i1> [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select <3 x i1> [[C]], <3 x i1> [[B:%.*]], <3 x i1> zeroinitializer
-; CHECK-NEXT: [[OR:%.*]] = select <3 x i1> [[AC]], <3 x i1> <i1 true, i1 true, i1 true>, <3 x i1> [[BC]]
+; CHECK-NEXT: [[TMP1:%.*]] = select <3 x i1> [[A:%.*]], <3 x i1> <i1 true, i1 true, i1 true>, <3 x i1> [[B:%.*]]
+; CHECK-NEXT: [[OR:%.*]] = select <3 x i1> [[C:%.*]], <3 x i1> [[TMP1]], <3 x i1> zeroinitializer
; CHECK-NEXT: ret <3 x i1> [[OR]]
;
%ac = and <3 x i1> %c, %a
@@ -300,9 +291,8 @@ define <3 x i1> @and_logic_and_logic_or_vector_poison1(<3 x i1> %c, <3 x i1> %a,
define <3 x i1> @and_logic_and_logic_or_vector_poison2(<3 x i1> %c, <3 x i1> %a, <3 x i1> %b) {
; CHECK-LABEL: @and_logic_and_logic_or_vector_poison2(
-; CHECK-NEXT: [[AC:%.*]] = and <3 x i1> [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select <3 x i1> [[C]], <3 x i1> [[B:%.*]], <3 x i1> zeroinitializer
-; CHECK-NEXT: [[OR:%.*]] = select <3 x i1> [[AC]], <3 x i1> <i1 poison, i1 true, i1 true>, <3 x i1> [[BC]]
+; CHECK-NEXT: [[TMP1:%.*]] = select <3 x i1> [[A:%.*]], <3 x i1> <i1 true, i1 true, i1 true>, <3 x i1> [[B:%.*]]
+; CHECK-NEXT: [[OR:%.*]] = select <3 x i1> [[C:%.*]], <3 x i1> [[TMP1]], <3 x i1> zeroinitializer
; CHECK-NEXT: ret <3 x i1> [[OR]]
;
%ac = and <3 x i1> %c, %a
@@ -330,9 +320,8 @@ define i1 @and_logic_and_logic_or_not_one_use(i1 %c, i1 %a, i1 %b) {
define i1 @and_and_logic_or_1(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @and_and_logic_or_1(
-; CHECK-NEXT: [[AC:%.*]] = and i1 [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = and i1 [[C]], [[B:%.*]]
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[AC]], i1 true, i1 [[BC]]
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[A:%.*]], i1 true, i1 [[B:%.*]]
+; CHECK-NEXT: [[OR:%.*]] = and i1 [[TMP1]], [[C:%.*]]
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = and i1 %c, %a
@@ -343,9 +332,8 @@ define i1 @and_and_logic_or_1(i1 %c, i1 %a, i1 %b) {
define i1 @and_and_logic_or_2(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @and_and_logic_or_2(
-; CHECK-NEXT: [[AC:%.*]] = and i1 [[A:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = and i1 [[C]], [[B:%.*]]
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[BC]], i1 true, i1 [[AC]]
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[B:%.*]], i1 true, i1 [[A:%.*]]
+; CHECK-NEXT: [[OR:%.*]] = and i1 [[TMP1]], [[C:%.*]]
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = and i1 %a, %c
@@ -356,9 +344,8 @@ define i1 @and_and_logic_or_2(i1 %c, i1 %a, i1 %b) {
define <3 x i1> @and_and_logic_or_vector(<3 x i1> %c, <3 x i1> %a, <3 x i1> %b) {
; CHECK-LABEL: @and_and_logic_or_vector(
-; CHECK-NEXT: [[AC:%.*]] = and <3 x i1> [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = and <3 x i1> [[C]], [[B:%.*]]
-; CHECK-NEXT: [[OR:%.*]] = select <3 x i1> [[AC]], <3 x i1> <i1 true, i1 true, i1 true>, <3 x i1> [[BC]]
+; CHECK-NEXT: [[TMP1:%.*]] = select <3 x i1> [[A:%.*]], <3 x i1> <i1 true, i1 true, i1 true>, <3 x i1> [[B:%.*]]
+; CHECK-NEXT: [[OR:%.*]] = and <3 x i1> [[TMP1]], [[C:%.*]]
; CHECK-NEXT: ret <3 x i1> [[OR]]
;
%ac = and <3 x i1> %c, %a
@@ -369,9 +356,8 @@ define <3 x i1> @and_and_logic_or_vector(<3 x i1> %c, <3 x i1> %a, <3 x i1> %b)
define <3 x i1> @and_and_logic_or_vector_poison(<3 x i1> %c, <3 x i1> %a, <3 x i1> %b) {
; CHECK-LABEL: @and_and_logic_or_vector_poison(
-; CHECK-NEXT: [[AC:%.*]] = and <3 x i1> [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = and <3 x i1> [[C]], [[B:%.*]]
-; CHECK-NEXT: [[OR:%.*]] = select <3 x i1> [[AC]], <3 x i1> <i1 true, i1 poison, i1 true>, <3 x i1> [[BC]]
+; CHECK-NEXT: [[TMP1:%.*]] = select <3 x i1> [[A:%.*]], <3 x i1> <i1 true, i1 true, i1 true>, <3 x i1> [[B:%.*]]
+; CHECK-NEXT: [[OR:%.*]] = and <3 x i1> [[TMP1]], [[C:%.*]]
; CHECK-NEXT: ret <3 x i1> [[OR]]
;
%ac = and <3 x i1> %c, %a
@@ -564,9 +550,8 @@ define i1 @logic_or_logic_and_not_one_use(i1 %c, i1 %a, i1 %b) {
define i1 @or_logic_or_logic_and_1(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @or_logic_or_logic_and_1(
-; CHECK-NEXT: [[AC:%.*]] = or i1 [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select i1 [[C]], i1 true, i1 [[B:%.*]]
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[AC]], i1 [[BC]], i1 false
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[A:%.*]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[C:%.*]], i1 true, i1 [[TMP1]]
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = or i1 %c, %a
@@ -577,9 +562,8 @@ define i1 @or_logic_or_logic_and_1(i1 %c, i1 %a, i1 %b) {
define i1 @or_logic_or_logic_and_2(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @or_logic_or_logic_and_2(
-; CHECK-NEXT: [[AC:%.*]] = or i1 [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select i1 [[B:%.*]], i1 true, i1 [[C]]
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[AC]], i1 [[BC]], i1 false
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[A:%.*]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[C:%.*]], i1 true, i1 [[TMP1]]
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = or i1 %c, %a
@@ -590,9 +574,8 @@ define i1 @or_logic_or_logic_and_2(i1 %c, i1 %a, i1 %b) {
define i1 @or_logic_or_logic_and_3(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @or_logic_or_logic_and_3(
-; CHECK-NEXT: [[AC:%.*]] = or i1 [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select i1 [[C]], i1 true, i1 [[B:%.*]]
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[BC]], i1 [[AC]], i1 false
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[B:%.*]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[C:%.*]], i1 true, i1 [[TMP1]]
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = or i1 %c, %a
@@ -603,9 +586,8 @@ define i1 @or_logic_or_logic_and_3(i1 %c, i1 %a, i1 %b) {
define i1 @or_logic_or_logic_and_4(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @or_logic_or_logic_and_4(
-; CHECK-NEXT: [[AC:%.*]] = or i1 [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select i1 [[B:%.*]], i1 true, i1 [[C]]
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[BC]], i1 [[AC]], i1 false
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[B:%.*]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[TMP1]], [[C:%.*]]
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = or i1 %c, %a
@@ -616,9 +598,8 @@ define i1 @or_logic_or_logic_and_4(i1 %c, i1 %a, i1 %b) {
define i1 @or_logic_or_logic_and_5(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @or_logic_or_logic_and_5(
-; CHECK-NEXT: [[AC:%.*]] = or i1 [[A:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select i1 [[C]], i1 true, i1 [[B:%.*]]
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[AC]], i1 [[BC]], i1 false
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[A:%.*]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[C:%.*]], i1 true, i1 [[TMP1]]
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = or i1 %a, %c
@@ -629,9 +610,8 @@ define i1 @or_logic_or_logic_and_5(i1 %c, i1 %a, i1 %b) {
define i1 @or_logic_or_logic_and_6(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @or_logic_or_logic_and_6(
-; CHECK-NEXT: [[AC:%.*]] = or i1 [[A:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select i1 [[B:%.*]], i1 true, i1 [[C]]
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[AC]], i1 [[BC]], i1 false
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[A:%.*]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[C:%.*]], i1 true, i1 [[TMP1]]
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = or i1 %a, %c
@@ -642,9 +622,8 @@ define i1 @or_logic_or_logic_and_6(i1 %c, i1 %a, i1 %b) {
define i1 @or_logic_or_logic_and_7(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @or_logic_or_logic_and_7(
-; CHECK-NEXT: [[AC:%.*]] = or i1 [[A:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select i1 [[C]], i1 true, i1 [[B:%.*]]
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[BC]], i1 [[AC]], i1 false
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[B:%.*]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[C:%.*]], i1 true, i1 [[TMP1]]
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = or i1 %a, %c
@@ -655,9 +634,8 @@ define i1 @or_logic_or_logic_and_7(i1 %c, i1 %a, i1 %b) {
define i1 @or_logic_or_logic_and_8(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @or_logic_or_logic_and_8(
-; CHECK-NEXT: [[AC:%.*]] = or i1 [[A:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select i1 [[B:%.*]], i1 true, i1 [[C]]
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[BC]], i1 [[AC]], i1 false
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[B:%.*]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[TMP1]], [[C:%.*]]
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = or i1 %a, %c
@@ -668,9 +646,8 @@ define i1 @or_logic_or_logic_and_8(i1 %c, i1 %a, i1 %b) {
define <3 x i1> @or_logic_or_logic_and_vector(<3 x i1> %c, <3 x i1> %a, <3 x i1> %b) {
; CHECK-LABEL: @or_logic_or_logic_and_vector(
-; CHECK-NEXT: [[AC:%.*]] = or <3 x i1> [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select <3 x i1> [[C]], <3 x i1> <i1 true, i1 true, i1 true>, <3 x i1> [[B:%.*]]
-; CHECK-NEXT: [[OR:%.*]] = select <3 x i1> [[AC]], <3 x i1> [[BC]], <3 x i1> zeroinitializer
+; CHECK-NEXT: [[TMP1:%.*]] = select <3 x i1> [[A:%.*]], <3 x i1> [[B:%.*]], <3 x i1> zeroinitializer
+; CHECK-NEXT: [[OR:%.*]] = select <3 x i1> [[C:%.*]], <3 x i1> <i1 true, i1 true, i1 true>, <3 x i1> [[TMP1]]
; CHECK-NEXT: ret <3 x i1> [[OR]]
;
%ac = or <3 x i1> %c, %a
@@ -694,9 +671,8 @@ define <3 x i1> @or_logic_or_logic_and_vector_poison1(<3 x i1> %c, <3 x i1> %a,
define <3 x i1> @or_logic_or_logic_and_vector_poison2(<3 x i1> %c, <3 x i1> %a, <3 x i1> %b) {
; CHECK-LABEL: @or_logic_or_logic_and_vector_poison2(
-; CHECK-NEXT: [[AC:%.*]] = or <3 x i1> [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = select <3 x i1> [[C]], <3 x i1> <i1 true, i1 true, i1 true>, <3 x i1> [[B:%.*]]
-; CHECK-NEXT: [[OR:%.*]] = select <3 x i1> [[AC]], <3 x i1> [[BC]], <3 x i1> <i1 false, i1 false, i1 poison>
+; CHECK-NEXT: [[TMP1:%.*]] = select <3 x i1> [[A:%.*]], <3 x i1> [[B:%.*]], <3 x i1> zeroinitializer
+; CHECK-NEXT: [[OR:%.*]] = select <3 x i1> [[C:%.*]], <3 x i1> <i1 true, i1 true, i1 true>, <3 x i1> [[TMP1]]
; CHECK-NEXT: ret <3 x i1> [[OR]]
;
%ac = or <3 x i1> %c, %a
@@ -724,9 +700,8 @@ define i1 @or_logic_or_logic_and_not_one_use(i1 %c, i1 %a, i1 %b) {
define i1 @or_or_logic_and_1(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @or_or_logic_and_1(
-; CHECK-NEXT: [[AC:%.*]] = or i1 [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = or i1 [[B:%.*]], [[C]]
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[AC]], i1 [[BC]], i1 false
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[A:%.*]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[TMP1]], [[C:%.*]]
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = or i1 %c, %a
@@ -737,9 +712,8 @@ define i1 @or_or_logic_and_1(i1 %c, i1 %a, i1 %b) {
define i1 @or_or_logic_and_2(i1 %c, i1 %a, i1 %b) {
; CHECK-LABEL: @or_or_logic_and_2(
-; CHECK-NEXT: [[AC:%.*]] = or i1 [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = or i1 [[B:%.*]], [[C]]
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[BC]], i1 [[AC]], i1 false
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[B:%.*]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[TMP1]], [[C:%.*]]
; CHECK-NEXT: ret i1 [[OR]]
;
%ac = or i1 %c, %a
@@ -750,9 +724,8 @@ define i1 @or_or_logic_and_2(i1 %c, i1 %a, i1 %b) {
define <3 x i1> @or_or_logic_and_vector(<3 x i1> %c, <3 x i1> %a, <3 x i1> %b) {
; CHECK-LABEL: @or_or_logic_and_vector(
-; CHECK-NEXT: [[AC:%.*]] = or <3 x i1> [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = or <3 x i1> [[B:%.*]], [[C]]
-; CHECK-NEXT: [[OR:%.*]] = select <3 x i1> [[AC]], <3 x i1> [[BC]], <3 x i1> zeroinitializer
+; CHECK-NEXT: [[TMP1:%.*]] = select <3 x i1> [[A:%.*]], <3 x i1> [[B:%.*]], <3 x i1> zeroinitializer
+; CHECK-NEXT: [[OR:%.*]] = or <3 x i1> [[TMP1]], [[C:%.*]]
; CHECK-NEXT: ret <3 x i1> [[OR]]
;
%ac = or <3 x i1> %c, %a
@@ -763,9 +736,8 @@ define <3 x i1> @or_or_logic_and_vector(<3 x i1> %c, <3 x i1> %a, <3 x i1> %b) {
define <3 x i1> @or_or_logic_and_vector_poison(<3 x i1> %c, <3 x i1> %a, <3 x i1> %b) {
; CHECK-LABEL: @or_or_logic_and_vector_poison(
-; CHECK-NEXT: [[AC:%.*]] = or <3 x i1> [[C:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[BC:%.*]] = or <3 x i1> [[B:%.*]], [[C]]
-; CHECK-NEXT: [[OR:%.*]] = select <3 x i1> [[AC]], <3 x i1> [[BC]], <3 x i1> <i1 poison, i1 false, i1 false>
+; CHECK-NEXT: [[TMP1:%.*]] = select <3 x i1> [[A:%.*]], <3 x i1> [[B:%.*]], <3 x i1> zeroinitializer
+; CHECK-NEXT: [[OR:%.*]] = or <3 x i1> [[TMP1]], [[C:%.*]]
; CHECK-NEXT: ret <3 x i1> [[OR]]
;
%ac = or <3 x i1> %c, %a
More information about the llvm-commits
mailing list