[PATCH] D139813: [PowerPC] Improve materialization for immediates which is almost a 32 bit splat.
Esme Yi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 8 17:35:38 PST 2023
Esme added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1334
+ // splat of a 32 bit immediate.
+ if (InstCntDirect > 4) {
+ uint32_t Hi16OfHi32 = (Hi_32(Imm) >> 16) & 0xffff;
----------------
shchenz wrote:
> For compile time concern, since the 1 instruction patterns for `Imm & 0xffffffff00000000` are simple, can we move the new code before line 1318 and do some simple check for 1 instruction pattern in `selectI64ImmDirect`?
Sorry I didn't quite understand this comment.
`Imm & 0xffffffff00000000` always takes more than 1 instruction because it is impossible to match the 1-instruction-pattern:
```
// 1-1) Patterns : {zeros}{15-bit valve}
// {ones}{15-bit valve}
// 1-2) Patterns : {zeros}{15-bit valve}{16 zeros}
// {ones}{15-bit valve}{16 zeros}
```
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139813/new/
https://reviews.llvm.org/D139813
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