[PATCH] D140573: [AVR] Optimize 32-bit shifts: optimize REG_SEQUENCE
Ayke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 8 11:06:20 PST 2023
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG9592920890cf: [AVR] Optimize 32-bit shifts: optimize REG_SEQUENCE (authored by aykevl).
Changed prior to commit:
https://reviews.llvm.org/D140573?vs=484910&id=487211#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D140573/new/
https://reviews.llvm.org/D140573
Files:
llvm/lib/Target/AVR/AVRISelLowering.cpp
llvm/test/CodeGen/AVR/shift32.ll
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