[PATCH] D141223: AMDGPU: Remove IsSourceOfDivergence check

[Ruiling, Song via Phabricator via llvm-commits]

ruiling created this revision.
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This bit is not set/reserved in td file. Let's remove it for now,
we can always add it back if we need it.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D141223

Files:
  llvm/lib/Target/AMDGPU/SIDefines.h
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp


Index: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -8397,9 +8397,6 @@
 
 InstructionUniformity
 SIInstrInfo::getInstructionUniformity(const MachineInstr &MI) const {
-  if (MI.getDesc().TSFlags & SIInstrFlags::IsSourceOfDivergence)
-    return InstructionUniformity::NeverUniform;
-
   // Atomics are divergent because they are executed sequentially: when an
   // atomic operation refers to the same address in each thread, then each
   // thread after the first sees the value written by the previous thread as
Index: llvm/lib/Target/AMDGPU/SIDefines.h
===================================================================
--- llvm/lib/Target/AMDGPU/SIDefines.h
+++ llvm/lib/Target/AMDGPU/SIDefines.h
@@ -130,13 +130,6 @@
 
   // Is a WMMA instruction.
   IsWMMA = UINT64_C(1) << 59,
-
-  // Is source of divergence.
-  //
-  // Note: There is no corresponding SIInstrInfo::IsSourceOfDivergence method
-  // by design, since this flag only covers opcodes that are _always_ divergent.
-  // Use SIInstrInfo::getInstructionUniformity for a more complete analysis.
-  IsSourceOfDivergence = UINT64_C(1) << 60
 };
 
 // v_cmp_class_* etc. use a 10-bit mask for what operation is checked.


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