[PATCH] D141214: [InstCombine] Don't combine smul of i1 type constant one

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp:4999
     case Instruction::Mul:
-      return match(RHS, m_One());
+      return !(RHS->getType()->isIntegerTy(1) && IsSigned) &&
+             match(RHS, m_One());
----------------
What about i1 vectors?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141214/new/

https://reviews.llvm.org/D141214