[PATCH] D141210: [AVR] Do not select unimplemented pseudo instructions

[Ben Shi via Phabricator via llvm-commits]

benshi001 created this revision.
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The expansion of pseudo instructions LPMWRdZPi/ELPMBRdZPi/ELPMWRdZPi
have not be implemented, so we should not select them currently.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D141210

Files:
  llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
  llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp


Index: llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
===================================================================
--- llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
+++ llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
@@ -188,18 +188,13 @@
   unsigned Opcode = 0;
   int Offs = cast<ConstantSDNode>(LD->getOffset())->getSExtValue();
 
-  switch (VT.SimpleTy) {
-  case MVT::i8:
-    if (Offs == 1)
-      Opcode = Bank > 0 ? AVR::ELPMBRdZPi : AVR::LPMRdZPi;
-    break;
-  case MVT::i16:
-    if (Offs == 2)
-      Opcode = Bank > 0 ? AVR::ELPMWRdZPi : AVR::LPMWRdZPi;
-    break;
-  default:
-    break;
-  }
+  if (VT.SimpleTy == MVT::i8 && Offs == 1 && Bank == 0)
+    Opcode = AVR::LPMRdZPi;
+
+  // TODO: Implements the expansion of the following pseudo instructions.
+  // LPMWRdZPi:  type == MVT::i16, offset == 2, Bank == 0.
+  // ELPMBRdZPi: type == MVT::i8,  offset == 1, Bank >  0.
+  // ELPMWRdZPi: type == MVT::i16, offset == 2, Bank >  0.
 
   return Opcode;
 }
Index: llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
===================================================================
--- llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
+++ llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
@@ -888,7 +888,7 @@
 
 template <>
 bool AVRExpandPseudo::expand<AVR::ELPMBRdZPi>(Block &MBB, BlockIt MBBI) {
-  llvm_unreachable("byte ELPMPi is unimplemented");
+  llvm_unreachable("8-bit ELPMPi is unimplemented");
 }
 
 template <>


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