[PATCH] D139419: [AArch64] lower abs intrinsic to new ABS instruction in GIsel
Amara Emerson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 6 14:55:17 PST 2023
aemerson added inline comments.
================
Comment at: llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp:758-760
+ .lowerIf([=](const LegalityQuery &Query) {
+ return isScalar(0)(Query) &&
+ !typeInSet(0, {s32, s64})(Query);
----------------
Sorry, just spotted something else. This rule now is partially redundant since {s32,s64} are legal. It's just `.lowerIf(isScalar(0))`, which also means that most of this can be merged with the non-CSSC rules. You can do:
```
if (HasCSSC)
ABSActions
.legalFor({s32, s64})
ABSActions
.legalFor(PackedVectorAllTypeList)
.lowerIf(isScalar(0));
```
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139419/new/
https://reviews.llvm.org/D139419
More information about the llvm-commits
mailing list