[PATCH] D141127: AMDGPU/GlobalISel: Widen s1 SGPR constants during regbankselect

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 6 05:31:34 PST 2023


arsenm created this revision.
arsenm added reviewers: AMDGPU, foad, Pierre-vh, mbrkusanin, Petar.Avramovic.
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To unambiguously interpret these as 32-bit SGPRs, we need to widen
these to s32. This was selecting to a copy from a 64-bit SGPR to a
32-bit SGPR for wave64.


https://reviews.llvm.org/D141127

Files:
  llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/br-constant-invalid-sgpr-copy.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kill.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.demote.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-xor.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll

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