[PATCH] D141075: [SelectionDAG] Implicitly truncate known bits in SPLAT_VECTOR

[Luke Lau via Phabricator via llvm-commits]

luke updated this revision to Diff 486786.
luke marked an inline comment as done.
luke added a comment.

Update test cases


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141075/new/

https://reviews.llvm.org/D141075

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/test/CodeGen/AArch64/active_lane_mask.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-fp-select.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-int-select.ll
  llvm/test/CodeGen/AArch64/sve-umulo-sdnode.ll

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