[PATCH] D139419: [AArch64] lower abs intrinsic to new ABS instruction in GIsel
Amara Emerson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 5 10:15:53 PST 2023
aemerson added inline comments.
================
Comment at: llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp:757-760
+ .legalIf([=](const LegalityQuery &Query) {
+ return typeInSet(0, {s32, s64})(Query) ||
+ llvm::is_contained(LegalABSVectorTypes, Query.Types[0]);
+ })
----------------
Am I reading this wrong or can't this be:
```
.legalFor({s32, s64})
.legalIf(typeInSet(0, LegalABSVectorTypes)
```
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139419/new/
https://reviews.llvm.org/D139419
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