[llvm] ad14cef - [InstCombine] add tests for cmp of pow2 mask; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 5 09:28:13 PST 2023
Author: Sanjay Patel
Date: 2023-01-05T12:28:08-05:00
New Revision: ad14cef1d530cab731fb60daddc983790cdcf3cb
URL: https://github.com/llvm/llvm-project/commit/ad14cef1d530cab731fb60daddc983790cdcf3cb
DIFF: https://github.com/llvm/llvm-project/commit/ad14cef1d530cab731fb60daddc983790cdcf3cb.diff
LOG: [InstCombine] add tests for cmp of pow2 mask; NFC
Added:
Modified:
llvm/test/Transforms/InstCombine/icmp-and-shift.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/icmp-and-shift.ll b/llvm/test/Transforms/InstCombine/icmp-and-shift.ll
index f73915adefd14..8dab225ce528e 100644
--- a/llvm/test/Transforms/InstCombine/icmp-and-shift.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-and-shift.ll
@@ -112,8 +112,8 @@ define i32 @icmp_eq_and_pow2_shl_pow2_negative1(i32 %0) {
; CHECK-NEXT: [[SHL:%.*]] = shl i32 11, [[TMP0:%.*]]
; CHECK-NEXT: [[AND:%.*]] = lshr i32 [[SHL]], 4
; CHECK-NEXT: [[AND_LOBIT:%.*]] = and i32 [[AND]], 1
-; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[AND_LOBIT]], 1
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[CONV:%.*]] = xor i32 [[AND_LOBIT]], 1
+; CHECK-NEXT: ret i32 [[CONV]]
;
%shl = shl i32 11, %0
%and = and i32 %shl, 16
@@ -408,8 +408,8 @@ define i32 @icmp_eq_and1_lshr_pow2_negative1(i32 %0) {
; CHECK-LABEL: @icmp_eq_and1_lshr_pow2_negative1(
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 7, [[TMP0:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i32 [[LSHR]], 1
-; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[AND]], 1
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[CONV:%.*]] = xor i32 [[AND]], 1
+; CHECK-NEXT: ret i32 [[CONV]]
;
%lshr = lshr i32 7, %0
%and = and i32 %lshr, 1
@@ -432,3 +432,89 @@ define i32 @icmp_eq_and1_lshr_pow2_negative2(i32 %0) {
%conv = zext i1 %cmp to i32
ret i32 %conv
}
+
+define i1 @eq_and_shl_one(i8 %x, i8 %y) {
+; CHECK-LABEL: @eq_and_shl_one(
+; CHECK-NEXT: [[POW2:%.*]] = shl nuw i8 1, [[Y:%.*]]
+; CHECK-NEXT: [[AND:%.*]] = and i8 [[POW2]], [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[AND]], [[POW2]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %pow2 = shl i8 1, %y
+ %and = and i8 %pow2, %x
+ %cmp = icmp eq i8 %and, %pow2
+ ret i1 %cmp
+}
+
+define <2 x i1> @ne_and_shl_one_commute(<2 x i8> %x, <2 x i8> %y) {
+; CHECK-LABEL: @ne_and_shl_one_commute(
+; CHECK-NEXT: [[POW2:%.*]] = shl nuw <2 x i8> <i8 1, i8 poison>, [[Y:%.*]]
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[POW2]], [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i8> [[POW2]], [[AND]]
+; CHECK-NEXT: ret <2 x i1> [[CMP]]
+;
+ %pow2 = shl <2 x i8> <i8 1, i8 poison>, %y
+ %and = and <2 x i8> %pow2, %x
+ %cmp = icmp ne <2 x i8> %pow2, %and
+ ret <2 x i1> %cmp
+}
+
+define i1 @ne_and_lshr_minval(i8 %px, i8 %y) {
+; CHECK-LABEL: @ne_and_lshr_minval(
+; CHECK-NEXT: [[X:%.*]] = mul i8 [[PX:%.*]], [[PX]]
+; CHECK-NEXT: [[POW2:%.*]] = lshr i8 -128, [[Y:%.*]]
+; CHECK-NEXT: [[AND:%.*]] = and i8 [[X]], [[POW2]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[AND]], [[POW2]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %x = mul i8 %px, %px ; thwart complexity-based canonicalization
+ %pow2 = lshr i8 -128, %y
+ %and = and i8 %x, %pow2
+ %cmp = icmp ne i8 %and, %pow2
+ ret i1 %cmp
+}
+
+define i1 @eq_and_lshr_minval_commute(i8 %px, i8 %y) {
+; CHECK-LABEL: @eq_and_lshr_minval_commute(
+; CHECK-NEXT: [[X:%.*]] = mul i8 [[PX:%.*]], [[PX]]
+; CHECK-NEXT: [[POW2:%.*]] = lshr i8 -128, [[Y:%.*]]
+; CHECK-NEXT: call void @use(i8 [[POW2]])
+; CHECK-NEXT: [[AND:%.*]] = and i8 [[X]], [[POW2]]
+; CHECK-NEXT: call void @use(i8 [[AND]])
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[POW2]], [[AND]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %x = mul i8 %px, %px ; thwart complexity-based canonicalization
+ %pow2 = lshr i8 -128, %y
+ call void @use(i8 %pow2)
+ %and = and i8 %x, %pow2
+ call void @use(i8 %and)
+ %cmp = icmp eq i8 %pow2, %and
+ ret i1 %cmp
+}
+
+define i1 @eq_and_shl_two(i8 %x, i8 %y) {
+; CHECK-LABEL: @eq_and_shl_two(
+; CHECK-NEXT: [[POW2_OR_ZERO:%.*]] = shl i8 2, [[Y:%.*]]
+; CHECK-NEXT: [[AND:%.*]] = and i8 [[POW2_OR_ZERO]], [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[AND]], [[POW2_OR_ZERO]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %pow2_or_zero = shl i8 2, %y
+ %and = and i8 %x, %pow2_or_zero
+ %cmp = icmp eq i8 %and, %pow2_or_zero
+ ret i1 %cmp
+}
+
+define i1 @slt_and_shl_one(i8 %x, i8 %y) {
+; CHECK-LABEL: @slt_and_shl_one(
+; CHECK-NEXT: [[POW2:%.*]] = shl nuw i8 1, [[Y:%.*]]
+; CHECK-NEXT: [[AND:%.*]] = and i8 [[POW2]], [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[AND]], [[POW2]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %pow2 = shl i8 1, %y
+ %and = and i8 %x, %pow2
+ %cmp = icmp slt i8 %and, %pow2
+ ret i1 %cmp
+}
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