[PATCH] D140851: [Patch 3/4]: Add cases for assume (X & Y != {0|Y})

[Sanjay Patel via Phabricator via llvm-commits]

spatel added inline comments.


================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp:4832-4834
+  // Canonicalize:
+  // 1. A & B_Pow2 != B_Pow2 -> A & B_Pow2 == 0
+  // 1. A & B_Pow2 == B_Pow2 -> A & B_Pow2 != 0
----------------
This should be split into an independent patch with several tests.

Double-check to make sure this is the same logic, but I think it'd be shorter and easier to read without the loop:
  // If Op1 is a power-of-2 (has exactly one bit set):
  // (Op1 & X) == Op1 --> (Op1 & X) != 0
  // (Op1 & X) != Op1 --> (Op1 & X) == 0
  if (match(Op0, m_c_And(m_Specific(Op1), m_Value())) &&
      isKnownToBeAPowerOfTwo(Op1, false, 0, &I)) {
    return new ICmpInst(CmpInst::getInversePredicate(Pred), Op0,
                        ConstantInt::getNullValue(Op0->getType()));
  }
  // If Op0 is a power-of-2 (has exactly one bit set):
  // Op0 == (Op0 & X) --> (Op0 & X) != 0
  // Op0 != (Op0 & X) --> (Op0 & X) == 0
  if (match(Op1, m_c_And(m_Specific(Op0), m_Value())) &&
      isKnownToBeAPowerOfTwo(Op0, false, 0, &I)) {
    return new ICmpInst(CmpInst::getInversePredicate(Pred), Op1,
                        ConstantInt::getNullValue(Op0->getType()));
  }



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https://reviews.llvm.org/D140851