[PATCH] D141048: [SelectionDAG] Add missing setValue calls in visitIntrinsicCall

[Marco Elver via Phabricator via llvm-commits]

melver requested changes to this revision.
melver added inline comments.
This revision now requires changes to proceed.


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Comment at: llvm/test/CodeGen/AArch64/SelectionDAG/arm64-pcsections-selectiondag.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+; RUN: llc < %s -mtriple=aarch64-unknown-linux-gnu -stop-after=aarch64-expand-pseudo -verify-machineinstrs | FileCheck %s
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Similar to x86 comment:

I think we want to say -global-isel=0, to ensure GlobalISel isn't used?

Also, just call it similar to the x86 one 'pcsections-memtransfer.ll', i.e. it'll end up in 'CodeGen/AArch64/pcsections-memtransfer.ll'.


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Comment at: llvm/test/CodeGen/AArch64/SelectionDAG/arm64-pcsections-selectiondag.ll:87-100
+  ; CHECK-LABEL: name: call_memcpy_element_unordered_atomic_intrinsic
+  ; CHECK: bb.0 (%ir-block.0):
+  ; CHECK-NEXT:   liveins: $lr
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store (s64) into %stack.2)
+  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION def_cfa_offset 16
+  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $w30, -16
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I see no pcsections, is it still missing?


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Comment at: llvm/test/CodeGen/AArch64/SelectionDAG/arm64-pcsections-selectiondag.ll:109-122
+  ; CHECK-LABEL: name: call_memmove_element_unordered_atomic_intrinsic
+  ; CHECK: bb.0 (%ir-block.0):
+  ; CHECK-NEXT:   liveins: $lr
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store (s64) into %stack.2)
+  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION def_cfa_offset 16
+  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $w30, -16
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I see no pcsections, is it still missing?


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Comment at: llvm/test/CodeGen/AArch64/SelectionDAG/arm64-pcsections-selectiondag.ll:131-144
+  ; CHECK-LABEL: name: call_memset_element_unordered_atomic_intrinsic
+  ; CHECK: bb.0 (%ir-block.0):
+  ; CHECK-NEXT:   liveins: $lr
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store (s64) into %stack.1)
+  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION def_cfa_offset 16
+  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $w30, -16
----------------
I see no pcsections, is it still missing?


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Comment at: llvm/test/CodeGen/X86/SelectionDAG/x64-pcsections-memtransfer.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -stop-after=finalize-isel -verify-machineinstrs | FileCheck %s -check-prefix=X64
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I think creating a SelectionDAG subdir is unnecessary (you're the first to create it). I think we can just dump it in X86/

Also, I think we need to explicitly make sure global-isel isn't used as it might be enabled in future, at which point it doesn't test SelectionDAG anymore.

E.g. see llvm/test/CodeGen/X86/switch-bit-test-unreachable-default.ll

I'd name this test simply 'pcsections-memtransfer.ll'


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141048/new/

https://reviews.llvm.org/D141048