[PATCH] D140907: [GlobalISel] New combine to commute constant operands to the RHS

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 5 03:13:15 PST 2023


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG0d518ae50cba: [GlobalISel] New combine to commute constant operands to the RHS (authored by foad).

Changed prior to commit:
  https://reviews.llvm.org/D140907?vs=486016&id=486516#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140907/new/

https://reviews.llvm.org/D140907

Files:
  llvm/include/llvm/Target/GlobalISel/Combine.td
  llvm/test/CodeGen/AArch64/GlobalISel/combine-add-of-sub.mir
  llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-immed-mismatch-crash.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fold-binop-into-select.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-trunc-bitcast-buildvector.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll

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