[PATCH] D139419: [AArch64] lower abs intrinsic to new ABS instruction in GIsel

Amara Emerson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 5 00:52:41 PST 2023


aemerson added inline comments.


================
Comment at: llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp:744-753
+      .lowerIf([=](const LegalityQuery &Query) {
+                 if (HasCSSC && typeInSet(0, {s32, s64})(Query))
+                   return false;
+                 return isScalar(0)(Query);
+               })
+      .legalIf([=](const LegalityQuery &Query) {
+                 if (HasCSSC && typeInSet(0, {s32, s64})(Query))
----------------
Can you do the check outside so we can avoid using predicates?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139419/new/

https://reviews.llvm.org/D139419



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