[llvm] 5226077 - [X86] Autogen tests for ease of update in upcoming change [nfc]
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 4 11:31:08 PST 2023
Author: Philip Reames
Date: 2023-01-04T11:30:49-08:00
New Revision: 5226077b210d19108aee31475e9d2fbca2b71d25
URL: https://github.com/llvm/llvm-project/commit/5226077b210d19108aee31475e9d2fbca2b71d25
DIFF: https://github.com/llvm/llvm-project/commit/5226077b210d19108aee31475e9d2fbca2b71d25.diff
LOG: [X86] Autogen tests for ease of update in upcoming change [nfc]
Added:
Modified:
llvm/test/CodeGen/X86/fold-add.ll
llvm/test/CodeGen/X86/hipe-cc.ll
llvm/test/CodeGen/X86/hipe-cc64.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/fold-add.ll b/llvm/test/CodeGen/X86/fold-add.ll
index 26396c3fc66a..c6c787a4b2d2 100644
--- a/llvm/test/CodeGen/X86/fold-add.ll
+++ b/llvm/test/CodeGen/X86/fold-add.ll
@@ -1,36 +1,60 @@
-; RUN: llc -mtriple=x86_64 -relocation-model=static < %s | FileCheck --check-prefixes=CHECK,STATIC %s
-; RUN: llc -mtriple=x86_64 -relocation-model=pic < %s | FileCheck --check-prefixes=CHECK,PIC %s
-; RUN: llc -mtriple=x86_64 -code-model=medium -relocation-model=static < %s | FileCheck --check-prefixes=CHECK,MSTATIC %s
-; RUN: llc -mtriple=x86_64 -code-model=medium -relocation-model=pic < %s | FileCheck --check-prefixes=CHECK,MPIC %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64 -relocation-model=static < %s | FileCheck --check-prefixes=STATIC %s
+; RUN: llc -mtriple=x86_64 -relocation-model=pic < %s | FileCheck --check-prefixes=PIC %s
+; RUN: llc -mtriple=x86_64 -code-model=medium -relocation-model=static < %s | FileCheck --check-prefixes=MSTATIC %s
+; RUN: llc -mtriple=x86_64 -code-model=medium -relocation-model=pic < %s | FileCheck --check-prefixes=MPIC %s
@foo = internal global i32 0
define dso_local i64 @zero() #0 {
-; CHECK-LABEL: zero:
-; CHECK: # %bb.0:
-; STATIC-NEXT: movl $foo, %eax
-; STATIC-NEXT: retq
-; PIC-NEXT: leaq foo(%rip), %rax
-; PIC-NEXT: retq
-; MSTATIC-NEXT: movabsq $foo, %rax
-; MSTATIC-NEXT: retq
-; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rcx
-; MPIC-NEXT: movabsq $foo at GOTOFF, %rax
-; MPIC-NEXT: addq %rcx, %rax
+; STATIC-LABEL: zero:
+; STATIC: # %bb.0: # %entry
+; STATIC-NEXT: movl $foo, %eax
+; STATIC-NEXT: retq
+;
+; PIC-LABEL: zero:
+; PIC: # %bb.0: # %entry
+; PIC-NEXT: leaq foo(%rip), %rax
+; PIC-NEXT: retq
+;
+; MSTATIC-LABEL: zero:
+; MSTATIC: # %bb.0: # %entry
+; MSTATIC-NEXT: movabsq $foo, %rax
+; MSTATIC-NEXT: retq
+;
+; MPIC-LABEL: zero:
+; MPIC: # %bb.0: # %entry
+; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rcx
+; MPIC-NEXT: movabsq $foo at GOTOFF, %rax
+; MPIC-NEXT: addq %rcx, %rax
+; MPIC-NEXT: retq
entry:
ret i64 add (i64 ptrtoint (ptr @foo to i64), i64 0)
}
define dso_local i64 @one() #0 {
-; CHECK-LABEL: one:
-; CHECK: # %bb.0:
-; STATIC-NEXT: movl $foo+1, %eax
-; PIC-NEXT: leaq foo+1(%rip), %rax
-; MSTATIC-NEXT: movabsq $foo, %rax
-; MSTATIC-NEXT: incq %rax
-; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rax
-; MPIC-NEXT: movabsq $foo at GOTOFF, %rcx
-; MPIC-NEXT: leaq 1(%rax,%rcx), %rax
+; STATIC-LABEL: one:
+; STATIC: # %bb.0: # %entry
+; STATIC-NEXT: movl $foo+1, %eax
+; STATIC-NEXT: retq
+;
+; PIC-LABEL: one:
+; PIC: # %bb.0: # %entry
+; PIC-NEXT: leaq foo+1(%rip), %rax
+; PIC-NEXT: retq
+;
+; MSTATIC-LABEL: one:
+; MSTATIC: # %bb.0: # %entry
+; MSTATIC-NEXT: movabsq $foo, %rax
+; MSTATIC-NEXT: incq %rax
+; MSTATIC-NEXT: retq
+;
+; MPIC-LABEL: one:
+; MPIC: # %bb.0: # %entry
+; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rax
+; MPIC-NEXT: movabsq $foo at GOTOFF, %rcx
+; MPIC-NEXT: leaq 1(%rax,%rcx), %rax
+; MPIC-NEXT: retq
entry:
ret i64 add (i64 ptrtoint (ptr @foo to i64), i64 1)
}
@@ -38,18 +62,30 @@ entry:
;; Check we don't fold a large offset into leaq, otherwise
;; the large r_addend can easily cause a relocation overflow.
define dso_local i64 @large() #0 {
-; CHECK-LABEL: large:
-; CHECK: # %bb.0:
-; STATIC-NEXT: movl $1701208431, %eax
-; STATIC-NEXT: leaq foo(%rax), %rax
-; PIC-NEXT: leaq foo(%rip), %rax
-; PIC-NEXT: addq $1701208431, %rax
-; MSTATIC-NEXT: movabsq $foo, %rax
-; MSTATIC-NEXT: addq $1701208431, %rax
-; MSTATIC-NEXT: retq
-; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rax
-; MPIC-NEXT: movabsq $foo at GOTOFF, %rcx
-; MPIC-NEXT: leaq 1701208431(%rax,%rcx), %rax
+; STATIC-LABEL: large:
+; STATIC: # %bb.0: # %entry
+; STATIC-NEXT: movl $1701208431, %eax # imm = 0x6566616F
+; STATIC-NEXT: leaq foo(%rax), %rax
+; STATIC-NEXT: retq
+;
+; PIC-LABEL: large:
+; PIC: # %bb.0: # %entry
+; PIC-NEXT: leaq foo(%rip), %rax
+; PIC-NEXT: addq $1701208431, %rax # imm = 0x6566616F
+; PIC-NEXT: retq
+;
+; MSTATIC-LABEL: large:
+; MSTATIC: # %bb.0: # %entry
+; MSTATIC-NEXT: movabsq $foo, %rax
+; MSTATIC-NEXT: addq $1701208431, %rax # imm = 0x6566616F
+; MSTATIC-NEXT: retq
+;
+; MPIC-LABEL: large:
+; MPIC: # %bb.0: # %entry
+; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rax
+; MPIC-NEXT: movabsq $foo at GOTOFF, %rcx
+; MPIC-NEXT: leaq 1701208431(%rax,%rcx), %rax
+; MPIC-NEXT: retq
entry:
ret i64 add (i64 ptrtoint (ptr @foo to i64), i64 1701208431)
}
@@ -57,15 +93,28 @@ entry:
;; Test we don't emit movl foo-1, %eax. ELF R_X86_64_32 does not allow
;; a negative value.
define dso_local i64 @neg_1() #0 {
-; CHECK-LABEL: neg_1:
-; CHECK: # %bb.0:
-; STATIC-NEXT: leaq foo-1(%rip), %rax
-; PIC-NEXT: leaq foo-1(%rip), %rax
-; MSTATIC-NEXT: movabsq $foo, %rax
-; MSTATIC-NEXT: decq %rax
-; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rax
-; MPIC-NEXT: movabsq $foo at GOTOFF, %rcx
-; MPIC-NEXT: leaq -1(%rax,%rcx), %rax
+; STATIC-LABEL: neg_1:
+; STATIC: # %bb.0: # %entry
+; STATIC-NEXT: leaq foo-1(%rip), %rax
+; STATIC-NEXT: retq
+;
+; PIC-LABEL: neg_1:
+; PIC: # %bb.0: # %entry
+; PIC-NEXT: leaq foo-1(%rip), %rax
+; PIC-NEXT: retq
+;
+; MSTATIC-LABEL: neg_1:
+; MSTATIC: # %bb.0: # %entry
+; MSTATIC-NEXT: movabsq $foo, %rax
+; MSTATIC-NEXT: decq %rax
+; MSTATIC-NEXT: retq
+;
+; MPIC-LABEL: neg_1:
+; MPIC: # %bb.0: # %entry
+; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rax
+; MPIC-NEXT: movabsq $foo at GOTOFF, %rcx
+; MPIC-NEXT: leaq -1(%rax,%rcx), %rax
+; MPIC-NEXT: retq
entry:
ret i64 add (i64 ptrtoint (ptr @foo to i64), i64 -1)
}
@@ -73,35 +122,61 @@ entry:
;; Test we don't emit movl foo-2147483648, %eax. ELF R_X86_64_32 does not allow
;; a negative value.
define dso_local i64 @neg_0x80000000() #0 {
-; CHECK-LABEL: neg_0x80000000:
-; CHECK: # %bb.0:
-; STATIC-NEXT: leaq foo-2147483648(%rip), %rax
-; PIC-NEXT: leaq foo-2147483648(%rip), %rax
-; MSTATIC-NEXT: movabsq $foo, %rax
-; MSTATIC-NEXT: addq $-2147483648, %rax
-; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rax
-; MPIC-NEXT: movabsq $foo at GOTOFF, %rcx
-; MPIC-NEXT: leaq -2147483648(%rax,%rcx), %rax
+; STATIC-LABEL: neg_0x80000000:
+; STATIC: # %bb.0: # %entry
+; STATIC-NEXT: leaq foo-2147483648(%rip), %rax
+; STATIC-NEXT: retq
+;
+; PIC-LABEL: neg_0x80000000:
+; PIC: # %bb.0: # %entry
+; PIC-NEXT: leaq foo-2147483648(%rip), %rax
+; PIC-NEXT: retq
+;
+; MSTATIC-LABEL: neg_0x80000000:
+; MSTATIC: # %bb.0: # %entry
+; MSTATIC-NEXT: movabsq $foo, %rax
+; MSTATIC-NEXT: addq $-2147483648, %rax # imm = 0x80000000
+; MSTATIC-NEXT: retq
+;
+; MPIC-LABEL: neg_0x80000000:
+; MPIC: # %bb.0: # %entry
+; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rax
+; MPIC-NEXT: movabsq $foo at GOTOFF, %rcx
+; MPIC-NEXT: leaq -2147483648(%rax,%rcx), %rax
+; MPIC-NEXT: retq
entry:
ret i64 add (i64 ptrtoint (ptr @foo to i64), i64 -2147483648)
}
define dso_local i64 @neg_0x80000001() #0 {
-; CHECK-LABEL: neg_0x80000001:
-; CHECK: # %bb.0:
-; STATIC-NEXT: movabsq $-2147483649, %rax
-; STATIC-NEXT: leaq foo(%rax), %rax
-; PIC-NEXT: leaq foo(%rip), %rcx
-; PIC-NEXT: movabsq $-2147483649, %rax
-; PIC-NEXT: addq %rcx, %rax
-; MSTATIC-NEXT: movabsq $-2147483649, %rcx
-; MSTATIC-NEXT: movabsq $foo, %rax
-; MSTATIC-NEXT: addq %rcx, %rax
-; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rcx
-; MPIC-NEXT: movabsq $foo at GOTOFF, %rdx
-; MPIC-NEXT: movabsq $-2147483649, %rax
-; MPIC-NEXT: addq %rdx, %rax
-; MPIC-NEXT: addq %rcx, %rax
+; STATIC-LABEL: neg_0x80000001:
+; STATIC: # %bb.0: # %entry
+; STATIC-NEXT: movabsq $-2147483649, %rax # imm = 0xFFFFFFFF7FFFFFFF
+; STATIC-NEXT: leaq foo(%rax), %rax
+; STATIC-NEXT: retq
+;
+; PIC-LABEL: neg_0x80000001:
+; PIC: # %bb.0: # %entry
+; PIC-NEXT: leaq foo(%rip), %rcx
+; PIC-NEXT: movabsq $-2147483649, %rax # imm = 0xFFFFFFFF7FFFFFFF
+; PIC-NEXT: addq %rcx, %rax
+; PIC-NEXT: retq
+;
+; MSTATIC-LABEL: neg_0x80000001:
+; MSTATIC: # %bb.0: # %entry
+; MSTATIC-NEXT: movabsq $-2147483649, %rcx # imm = 0xFFFFFFFF7FFFFFFF
+; MSTATIC-NEXT: movabsq $foo, %rax
+; MSTATIC-NEXT: addq %rcx, %rax
+; MSTATIC-NEXT: retq
+;
+; MPIC-LABEL: neg_0x80000001:
+; MPIC: # %bb.0: # %entry
+; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rcx
+; MPIC-NEXT: movabsq $foo at GOTOFF, %rdx
+; MPIC-NEXT: movabsq $-2147483649, %rax # imm = 0xFFFFFFFF7FFFFFFF
+; MPIC-NEXT: addq %rdx, %rax
+; MPIC-NEXT: addq %rcx, %rax
+; MPIC-NEXT: retq
entry:
ret i64 add (i64 ptrtoint (ptr @foo to i64), i64 -2147483649)
}
diff --git a/llvm/test/CodeGen/X86/hipe-cc.ll b/llvm/test/CodeGen/X86/hipe-cc.ll
index fd27f9742537..d8a78eabaf66 100644
--- a/llvm/test/CodeGen/X86/hipe-cc.ll
+++ b/llvm/test/CodeGen/X86/hipe-cc.ll
@@ -1,43 +1,64 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -code-model=medium -mtriple=i686-linux-gnu -mcpu=pentium | FileCheck %s
; Check the HiPE calling convention works (x86-32)
define void @zap(i32 %a, i32 %b) nounwind {
+; CHECK-LABEL: zap:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: pushl %ebp
+; CHECK-NEXT: pushl %ebx
+; CHECK-NEXT: pushl %edi
+; CHECK-NEXT: pushl %esi
+; CHECK-NEXT: subl $20, %esp
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
+; CHECK-NEXT: movl $8, %ecx
+; CHECK-NEXT: calll addfour at PLT
+; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; CHECK-NEXT: movl $2, {{[0-9]+}}(%esp)
+; CHECK-NEXT: movl $1, {{[0-9]+}}(%esp)
+; CHECK-NEXT: calll foo at PLT
+; CHECK-NEXT: addl $20, %esp
+; CHECK-NEXT: popl %esi
+; CHECK-NEXT: popl %edi
+; CHECK-NEXT: popl %ebx
+; CHECK-NEXT: popl %ebp
+; CHECK-NEXT: retl
entry:
- ; CHECK: movl 40(%esp), %eax
- ; CHECK-NEXT: movl 44(%esp), %edx
- ; CHECK-NEXT: movl $8, %ecx
- ; CHECK-NEXT: calll addfour
%0 = call cc 11 {i32, i32, i32} @addfour(i32 undef, i32 undef, i32 %a, i32 %b, i32 8)
%res = extractvalue {i32, i32, i32} %0, 2
- ; CHECK: movl %eax, 16(%esp)
- ; CHECK-NEXT: movl $2, 12(%esp)
- ; CHECK-NEXT: movl $1, 8(%esp)
- ; CHECK: calll foo
tail call void @foo(i32 undef, i32 undef, i32 1, i32 2, i32 %res) nounwind
ret void
}
define cc 11 {i32, i32, i32} @addfour(i32 %hp, i32 %p, i32 %x, i32 %y, i32 %z) nounwind {
+; CHECK-LABEL: addfour:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: addl %edx, %ecx
+; CHECK-NEXT: addl %ecx, %eax
+; CHECK-NEXT: retl
entry:
- ; CHECK: addl %edx, %ecx
- ; CHECK-NEXT: addl %ecx, %eax
%0 = add i32 %x, %y
%1 = add i32 %0, %z
- ; CHECK: ret
%res = insertvalue {i32, i32, i32} undef, i32 %1, 2
ret {i32, i32, i32} %res
}
define cc 11 void @foo(i32 %hp, i32 %p, i32 %arg0, i32 %arg1, i32 %arg2) nounwind {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: subl $20, %esp
+; CHECK-NEXT: movl %esi, {{[0-9]+}}(%esp)
+; CHECK-NEXT: movl %ebp, {{[0-9]+}}(%esp)
+; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; CHECK-NEXT: movl %edx, {{[0-9]+}}(%esp)
+; CHECK-NEXT: movl %ecx, (%esp)
+; CHECK-NEXT: addl $20, %esp
+; CHECK-NEXT: jmp bar at PLT # TAILCALL
entry:
- ; CHECK: movl %esi, 16(%esp)
- ; CHECK-NEXT: movl %ebp, 12(%esp)
- ; CHECK-NEXT: movl %eax, 8(%esp)
- ; CHECK-NEXT: movl %edx, 4(%esp)
- ; CHECK-NEXT: movl %ecx, (%esp)
%hp_var = alloca i32
%p_var = alloca i32
%arg0_var = alloca i32
@@ -54,16 +75,17 @@ entry:
%2 = load i32, ptr %arg0_var
%3 = load i32, ptr %arg1_var
%4 = load i32, ptr %arg2_var
- ; CHECK: jmp bar
tail call cc 11 void @bar(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) nounwind
ret void
}
define cc 11 void @baz() nounwind {
+; CHECK-LABEL: baz:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl $42, %eax
+; CHECK-NEXT: jmpl *clos # TAILCALL
%tmp_clos = load i32, ptr @clos
%tmp_clos2 = inttoptr i32 %tmp_clos to ptr
- ; CHECK: movl $42, %eax
- ; CHECK-NEXT: jmpl *clos
tail call cc 11 void %tmp_clos2(i32 undef, i32 undef, i32 42) nounwind
ret void
}
@@ -71,11 +93,17 @@ define cc 11 void @baz() nounwind {
; Sanity-check the tail call sequence. Number of arguments was chosen as to
; expose a bug where the tail call sequence clobbered the stack.
define cc 11 { i32, i32, i32 } @tailcaller(i32 %hp, i32 %p) nounwind {
- ; CHECK: movl $15, %eax
- ; CHECK-NEXT: movl $31, %edx
- ; CHECK-NEXT: movl $47, %ecx
- ; CHECK-NEXT: popl %edi
- ; CHECK-NEXT: jmp tailcallee
+; CHECK-LABEL: tailcaller:
+; CHECK: # %bb.0:
+; CHECK-NEXT: subl $8, %esp
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; CHECK-NEXT: movl $63, {{[0-9]+}}(%esp)
+; CHECK-NEXT: movl $15, %eax
+; CHECK-NEXT: movl $31, %edx
+; CHECK-NEXT: movl $47, %ecx
+; CHECK-NEXT: popl %edi
+; CHECK-NEXT: jmp tailcallee at PLT # TAILCALL
%ret = tail call cc11 { i32, i32, i32 } @tailcallee(i32 %hp, i32 %p, i32 15,
i32 31, i32 47, i32 63) nounwind
ret { i32, i32, i32 } %ret
diff --git a/llvm/test/CodeGen/X86/hipe-cc64.ll b/llvm/test/CodeGen/X86/hipe-cc64.ll
index fec369965012..ed75015d3995 100644
--- a/llvm/test/CodeGen/X86/hipe-cc64.ll
+++ b/llvm/test/CodeGen/X86/hipe-cc64.ll
@@ -1,48 +1,71 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -relocation-model=static -code-model=medium -mtriple=x86_64-linux-gnu -mcpu=opteron | FileCheck %s
; Check the HiPE calling convention works (x86-64)
define void @zap(i64 %a, i64 %b) nounwind {
+; CHECK-LABEL: zap:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: pushq %rbp
+; CHECK-NEXT: pushq %r15
+; CHECK-NEXT: pushq %r14
+; CHECK-NEXT: pushq %r13
+; CHECK-NEXT: pushq %r12
+; CHECK-NEXT: pushq %rbx
+; CHECK-NEXT: movq %rsi, %rdx
+; CHECK-NEXT: movl $8, %ecx
+; CHECK-NEXT: movl $9, %r8d
+; CHECK-NEXT: movq %rdi, %rsi
+; CHECK-NEXT: callq addfour at PLT
+; CHECK-NEXT: movl $1, %edx
+; CHECK-NEXT: movl $2, %ecx
+; CHECK-NEXT: movl $3, %r8d
+; CHECK-NEXT: movq %rax, %r9
+; CHECK-NEXT: callq foo at PLT
+; CHECK-NEXT: popq %rbx
+; CHECK-NEXT: popq %r12
+; CHECK-NEXT: popq %r13
+; CHECK-NEXT: popq %r14
+; CHECK-NEXT: popq %r15
+; CHECK-NEXT: popq %rbp
+; CHECK-NEXT: retq
entry:
- ; CHECK: movq %rsi, %rdx
- ; CHECK-NEXT: movl $8, %ecx
- ; CHECK-NEXT: movl $9, %r8d
- ; CHECK-NEXT: movq %rdi, %rsi
- ; CHECK-NEXT: callq addfour
%0 = call cc 11 {i64, i64, i64} @addfour(i64 undef, i64 undef, i64 %a, i64 %b, i64 8, i64 9)
%res = extractvalue {i64, i64, i64} %0, 2
- ; CHECK: movl $1, %edx
- ; CHECK-NEXT: movl $2, %ecx
- ; CHECK-NEXT: movl $3, %r8d
- ; CHECK-NEXT: movq %rax, %r9
- ; CHECK: callq foo
tail call void @foo(i64 undef, i64 undef, i64 1, i64 2, i64 3, i64 %res) nounwind
ret void
}
define cc 11 {i64, i64, i64} @addfour(i64 %hp, i64 %p, i64 %x, i64 %y, i64 %z, i64 %w) nounwind {
+; CHECK-LABEL: addfour:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: leaq (%rdx,%rcx), %rax
+; CHECK-NEXT: addq %r8, %rax
+; CHECK-NEXT: addq %rsi, %rax
+; CHECK-NEXT: retq
entry:
- ; CHECK: leaq (%rdx,%rcx), %rax
- ; CHECK-NEXT: addq %r8, %rax
- ; CHECK-NEXT: addq %rsi, %rax
%0 = add i64 %x, %y
%1 = add i64 %0, %z
%2 = add i64 %1, %w
- ; CHECK: ret
%res = insertvalue {i64, i64, i64} undef, i64 %2, 2
ret {i64, i64, i64} %res
}
define cc 11 void @foo(i64 %hp, i64 %p, i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3) nounwind {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: subq $48, %rsp
+; CHECK-NEXT: movq %r15, {{[0-9]+}}(%rsp)
+; CHECK-NEXT: movq %rbp, {{[0-9]+}}(%rsp)
+; CHECK-NEXT: movq %rsi, {{[0-9]+}}(%rsp)
+; CHECK-NEXT: movq %rdx, {{[0-9]+}}(%rsp)
+; CHECK-NEXT: movq %rcx, {{[0-9]+}}(%rsp)
+; CHECK-NEXT: movq %r8, (%rsp)
+; CHECK-NEXT: addq $48, %rsp
+; CHECK-NEXT: jmp bar at PLT # TAILCALL
entry:
- ; CHECK: movq %r15, 40(%rsp)
- ; CHECK-NEXT: movq %rbp, 32(%rsp)
- ; CHECK-NEXT: movq %rsi, 24(%rsp)
- ; CHECK-NEXT: movq %rdx, 16(%rsp)
- ; CHECK-NEXT: movq %rcx, 8(%rsp)
- ; CHECK-NEXT: movq %r8, (%rsp)
%hp_var = alloca i64
%p_var = alloca i64
%arg0_var = alloca i64
@@ -56,23 +79,25 @@ entry:
store i64 %arg2, ptr %arg2_var
store i64 %arg3, ptr %arg3_var
- ; Loads are reading values just writen from corresponding register and are therefore noops.
+ ; Loads are reading values just writen from corresponding register and are therefore noops.
%0 = load i64, ptr %hp_var
%1 = load i64, ptr %p_var
%2 = load i64, ptr %arg0_var
%3 = load i64, ptr %arg1_var
%4 = load i64, ptr %arg2_var
%5 = load i64, ptr %arg3_var
- ; CHECK: jmp bar
tail call cc 11 void @bar(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5) nounwind
ret void
}
define cc 11 void @baz() nounwind {
+; CHECK-LABEL: baz:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movq clos at GOTPCREL(%rip), %rax
+; CHECK-NEXT: movl $42, %esi
+; CHECK-NEXT: jmpq *(%rax) # TAILCALL
%tmp_clos = load i64, ptr @clos
%tmp_clos2 = inttoptr i64 %tmp_clos to ptr
- ; CHECK: movl $42, %esi
- ; CHECK-NEXT: jmpq *(%rax)
tail call cc 11 void %tmp_clos2(i64 undef, i64 undef, i64 42) nounwind
ret void
}
@@ -80,13 +105,20 @@ define cc 11 void @baz() nounwind {
; Sanity-check the tail call sequence. Number of arguments was chosen as to
; expose a bug where the tail call sequence clobbered the stack.
define cc 11 { i64, i64, i64 } @tailcaller(i64 %hp, i64 %p) #0 {
- ; CHECK: movl $15, %esi
- ; CHECK-NEXT: movl $31, %edx
- ; CHECK-NEXT: movl $47, %ecx
- ; CHECK-NEXT: movl $63, %r8d
- ; CHECK-NEXT: popq %rax
- ; CHECK-NEXT: .cfi_def_cfa_offset 16
- ; CHECK-NEXT: jmp tailcallee
+; CHECK-LABEL: tailcaller:
+; CHECK: # %bb.0:
+; CHECK-NEXT: subq $16, %rsp
+; CHECK-NEXT: .cfi_def_cfa_offset 24
+; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax
+; CHECK-NEXT: movq %rax, {{[0-9]+}}(%rsp)
+; CHECK-NEXT: movq $79, {{[0-9]+}}(%rsp)
+; CHECK-NEXT: movl $15, %esi
+; CHECK-NEXT: movl $31, %edx
+; CHECK-NEXT: movl $47, %ecx
+; CHECK-NEXT: movl $63, %r8d
+; CHECK-NEXT: popq %rax
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: jmp tailcallee at PLT # TAILCALL
%ret = tail call cc11 { i64, i64, i64 } @tailcallee(i64 %hp, i64 %p, i64 15,
i64 31, i64 47, i64 63, i64 79) #1
ret { i64, i64, i64 } %ret
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