[llvm] 9560ac3 - [MachineCombine] Reorganize code for readability and tracing [nfc]

[Philip Reames via llvm-commits]

Author: Philip Reames
Date: 2023-01-04T10:47:39-08:00
New Revision: 9560ac3a250822536fd264a72b5115d7d964e6f3

URL: https://github.com/llvm/llvm-project/commit/9560ac3a250822536fd264a72b5115d7d964e6f3
DIFF: https://github.com/llvm/llvm-project/commit/9560ac3a250822536fd264a72b5115d7d964e6f3.diff

LOG: [MachineCombine] Reorganize code for readability and tracing [nfc]

Added: 
    

Modified: 
    llvm/lib/CodeGen/MachineCombiner.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/MachineCombiner.cpp b/llvm/lib/CodeGen/MachineCombiner.cpp
index bced97f7d49a..be70c6dba61d 100644
--- a/llvm/lib/CodeGen/MachineCombiner.cpp
+++ b/llvm/lib/CodeGen/MachineCombiner.cpp
@@ -90,7 +90,6 @@ class MachineCombiner : public MachineFunctionPass {
   StringRef getPassName() const override { return "Machine InstCombiner"; }
 
 private:
-  bool doSubstitute(unsigned NewSize, unsigned OldSize, bool OptForSize);
   bool combineInstructions(MachineBasicBlock *);
   MachineInstr *getOperandDef(const MachineOperand &MO);
   bool isTransientMI(const MachineInstr *MI);
@@ -485,17 +484,6 @@ bool MachineCombiner::preservesResourceLen(
          ResLenBeforeCombine + TII->getExtendResourceLenLimit();
 }
 
-/// \returns true when new instruction sequence should be generated
-/// independent if it lengthens critical path or not
-bool MachineCombiner::doSubstitute(unsigned NewSize, unsigned OldSize,
-                                   bool OptForSize) {
-  if (OptForSize && (NewSize < OldSize))
-    return true;
-  if (!TSchedModel.hasInstrSchedModelOrItineraries())
-    return true;
-  return false;
-}
-
 /// Inserts InsInstrs and deletes DelInstrs. Incrementally updates instruction
 /// depths if requested.
 ///
@@ -641,18 +629,16 @@ bool MachineCombiner::combineInstructions(MachineBasicBlock *MBB) {
     if (VerifyPatternOrder)
       verifyPatternOrder(MBB, MI, Patterns);
 
-    for (auto P : Patterns) {
+    for (const auto P : Patterns) {
       SmallVector<MachineInstr *, 16> InsInstrs;
       SmallVector<MachineInstr *, 16> DelInstrs;
       DenseMap<unsigned, unsigned> InstrIdxForVirtReg;
       TII->genAlternativeCodeSequence(MI, P, InsInstrs, DelInstrs,
                                       InstrIdxForVirtReg);
-      unsigned NewInstCount = InsInstrs.size();
-      unsigned OldInstCount = DelInstrs.size();
       // Found pattern, but did not generate alternative sequence.
       // This can happen e.g. when an immediate could not be materialized
       // in a single instruction.
-      if (!NewInstCount)
+      if (InsInstrs.empty())
         continue;
 
       LLVM_DEBUG(if (dump_intrs) {
@@ -667,10 +653,6 @@ bool MachineCombiner::combineInstructions(MachineBasicBlock *MBB) {
                           /*SkipDebugLoc*/false, /*AddNewLine*/true, TII);
       });
 
-      bool SubstituteAlways = false;
-      if (ML && TII->isThroughputPattern(P))
-        SubstituteAlways = true;
-
       if (IncrementalUpdate && LastUpdate != BlockIter) {
         // Update depths since the last incremental update.
         MinInstr->updateDepths(LastUpdate, BlockIter, RegUnits);
@@ -698,12 +680,24 @@ bool MachineCombiner::combineInstructions(MachineBasicBlock *MBB) {
         }
       }
 
-      // Substitute when we optimize for codesize and the new sequence has
-      // fewer instructions OR
-      // the new sequence neither lengthens the critical path nor increases
-      // resource pressure.
-      if (SubstituteAlways ||
-          doSubstitute(NewInstCount, OldInstCount, OptForSize)) {
+      if (ML && TII->isThroughputPattern(P)) {
+        LLVM_DEBUG(dbgs() << "\t Replacing due to throughput pattern in loop\n");
+        insertDeleteInstructions(MBB, MI, InsInstrs, DelInstrs, MinInstr,
+                                 RegUnits, TII, P, IncrementalUpdate);
+        // Eagerly stop after the first pattern fires.
+        Changed = true;
+        break;
+      } else if (OptForSize && InsInstrs.size() < DelInstrs.size()) {
+        LLVM_DEBUG(dbgs() << "\t Replacing due to OptForSize ("
+                          << InsInstrs.size() << " < "
+                          << DelInstrs.size() << ")\n");
+        insertDeleteInstructions(MBB, MI, InsInstrs, DelInstrs, MinInstr,
+                                 RegUnits, TII, P, IncrementalUpdate);
+        // Eagerly stop after the first pattern fires.
+        Changed = true;
+        break;
+      } else if (!TSchedModel.hasInstrSchedModelOrItineraries()) {
+        LLVM_DEBUG(dbgs() << "\t Replacing due to lack of schedule model\n");
         insertDeleteInstructions(MBB, MI, InsInstrs, DelInstrs, MinInstr,
                                  RegUnits, TII, P, IncrementalUpdate);
         // Eagerly stop after the first pattern fires.