[PATCH] D127115: [RFC][DAGCombine] Make sure combined nodes are added back to the worklist in topological order.

Wed Jan 4 07:53:52 PST 2023

deadalnix added a subscriber: kparzysz.
deadalnix added a comment.

Ok Let's try to make a list of what we want to see fixed before we proceed.

- AMDGPU: widen-smrd-loads.ll ? It doesn't look so bad, but having someone familiar with that target would help. I'm also not sure about the changes related to stores.
- ARM: Seems like wins accross the board by now.
- Hexagon: autohvx/mulh.ll needs someone to look into it.
- PowerPC: is the change in aix32-cc-abi-vaarg.ll a problem? The regression in store-forward-be64.ll is addressed by D140993 <https://reviews.llvm.org/D140993>
- RISCV: Seems like wins accross the board.
- SystemZ: No meaningful changes.
- Thumb2: mve-vst3.ll is worth looking into.
- X86: bitreverse.ll, dagcombine-select.ll, insert-into-constant-vector.ll, insertelement-var-index.ll, pr53419.ll, v8i1-masks.ll, vector-shuffle-combining.ll looks bad.

X86 is also the best covered target, so there is definitively a bias there, but it doesn't look so bad. Many of the regression there looks like they are vector shuffling related.

================
Comment at: llvm/test/CodeGen/Hexagon/autohvx/mulh.ll:19
+; V60-NEXT:    {
+; V60-NEXT:     v0.h = vpacko(v1.w,v0.w)
 ; V60-NEXT:    }
----------------
How do we get some Hexagon expert to look at this? @MaskRay ? @kparzysz ?

================
Comment at: llvm/test/CodeGen/X86/xor.ll:412
 ; X64-WIN:       # %bb.0:
+; X64-WIN-NEXT:    andb $1, %cl
 ; X64-WIN-NEXT:    movzbl %cl, %eax
----------------
I'd assume this is target dependent.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127115/new/

https://reviews.llvm.org/D127115