[llvm] 8383da1 - [SLPVectorizer] Name instructions in test (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 4 07:36:07 PST 2023
Author: Nikita Popov
Date: 2023-01-04T16:35:45+01:00
New Revision: 8383da1583aa6888fbb304b49760f045bbb1522c
URL: https://github.com/llvm/llvm-project/commit/8383da1583aa6888fbb304b49760f045bbb1522c
DIFF: https://github.com/llvm/llvm-project/commit/8383da1583aa6888fbb304b49760f045bbb1522c.diff
LOG: [SLPVectorizer] Name instructions in test (NFC)
Added:
Modified:
llvm/test/Transforms/SLPVectorizer/X86/crash_vectorizeTree.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/crash_vectorizeTree.ll b/llvm/test/Transforms/SLPVectorizer/X86/crash_vectorizeTree.ll
index a6ba94d3d0c5..f376372712ae 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/crash_vectorizeTree.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/crash_vectorizeTree.ll
@@ -18,82 +18,84 @@ target triple = "x86_64-apple-macosx10.9.0"
;define fastcc void @bar() {
define void @bar() {
; CHECK-LABEL: @bar(
-; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[TMP0:%.*]], %0* undef, i64 0, i32 1, i32 0
-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[TMP0]], %0* undef, i64 0, i32 1, i32 0
-; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[TMP0]], %0* undef, i64 0, i32 1, i32 0
-; CHECK-NEXT: br label [[TMP4:%.*]]
-; CHECK: 4:
-; CHECK-NEXT: [[TMP5:%.*]] = phi <2 x double> [ <double 1.800000e+01, double 2.800000e+01>, [[TMP0]] ], [ [[TMP8:%.*]], [[TMP16:%.*]] ], [ [[TMP8]], [[TMP15:%.*]] ], [ [[TMP8]], [[TMP15]] ]
-; CHECK-NEXT: [[TMP6:%.*]] = bitcast double* [[TMP1]] to <2 x double>*
-; CHECK-NEXT: store <2 x double> [[TMP5]], <2 x double>* [[TMP6]], align 8
-; CHECK-NEXT: [[TMP7:%.*]] = bitcast double* [[TMP2]] to <2 x double>*
-; CHECK-NEXT: [[TMP8]] = load <2 x double>, <2 x double>* [[TMP7]], align 8
-; CHECK-NEXT: br i1 undef, label [[TMP9:%.*]], label [[TMP10:%.*]]
-; CHECK: 9:
+; CHECK-NEXT: bb:
+; CHECK-NEXT: [[I:%.*]] = getelementptr inbounds [[TMP0:%.*]], %0* undef, i64 0, i32 1, i32 0
+; CHECK-NEXT: [[I2:%.*]] = getelementptr inbounds [[TMP0]], %0* undef, i64 0, i32 1, i32 0
+; CHECK-NEXT: [[I4:%.*]] = getelementptr inbounds [[TMP0]], %0* undef, i64 0, i32 1, i32 0
+; CHECK-NEXT: br label [[BB6:%.*]]
+; CHECK: bb6:
+; CHECK-NEXT: [[TMP0]] = phi <2 x double> [ <double 1.800000e+01, double 2.800000e+01>, [[BB:%.*]] ], [ [[TMP3:%.*]], [[BB17:%.*]] ], [ [[TMP3]], [[BB16:%.*]] ], [ [[TMP3]], [[BB16]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[I]] to <2 x double>*
+; CHECK-NEXT: store <2 x double> [[TMP0]], <2 x double>* [[TMP1]], align 8
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast double* [[I2]] to <2 x double>*
+; CHECK-NEXT: [[TMP3]] = load <2 x double>, <2 x double>* [[TMP2]], align 8
+; CHECK-NEXT: br i1 undef, label [[BB11:%.*]], label [[BB12:%.*]]
+; CHECK: bb11:
; CHECK-NEXT: ret void
-; CHECK: 10:
-; CHECK-NEXT: [[TMP11:%.*]] = bitcast double* [[TMP3]] to <2 x double>*
-; CHECK-NEXT: store <2 x double> [[TMP8]], <2 x double>* [[TMP11]], align 8
-; CHECK-NEXT: br i1 undef, label [[TMP12:%.*]], label [[TMP13:%.*]]
-; CHECK: 12:
-; CHECK-NEXT: br label [[TMP13]]
-; CHECK: 13:
-; CHECK-NEXT: br i1 undef, label [[TMP14:%.*]], label [[TMP15]]
-; CHECK: 14:
+; CHECK: bb12:
+; CHECK-NEXT: [[TMP4:%.*]] = bitcast double* [[I4]] to <2 x double>*
+; CHECK-NEXT: store <2 x double> [[TMP3]], <2 x double>* [[TMP4]], align 8
+; CHECK-NEXT: br i1 undef, label [[BB13:%.*]], label [[BB14:%.*]]
+; CHECK: bb13:
+; CHECK-NEXT: br label [[BB14]]
+; CHECK: bb14:
+; CHECK-NEXT: br i1 undef, label [[BB15:%.*]], label [[BB16]]
+; CHECK: bb15:
; CHECK-NEXT: unreachable
-; CHECK: 15:
-; CHECK-NEXT: switch i32 undef, label [[TMP16]] [
-; CHECK-NEXT: i32 32, label [[TMP4]]
-; CHECK-NEXT: i32 103, label [[TMP4]]
+; CHECK: bb16:
+; CHECK-NEXT: switch i32 undef, label [[BB17]] [
+; CHECK-NEXT: i32 32, label [[BB6]]
+; CHECK-NEXT: i32 103, label [[BB6]]
; CHECK-NEXT: ]
-; CHECK: 16:
-; CHECK-NEXT: br i1 undef, label [[TMP4]], label [[TMP17:%.*]]
-; CHECK: 17:
+; CHECK: bb17:
+; CHECK-NEXT: br i1 undef, label [[BB6]], label [[BB18:%.*]]
+; CHECK: bb18:
; CHECK-NEXT: unreachable
;
- %1 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 0
- %2 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 1
- %3 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 0
- %4 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 1
- %5 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 0
- %6 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 1
- br label %7
+bb:
+ %i = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 0
+ %i1 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 1
+ %i2 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 0
+ %i3 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 1
+ %i4 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 0
+ %i5 = getelementptr inbounds %0, %0* undef, i64 0, i32 1, i32 1
+ br label %bb6
-; <label>:7 ; preds = %18, %17, %17, %0
- %8 = phi double [ 2.800000e+01, %0 ], [ %11, %18 ], [ %11, %17 ], [ %11, %17 ]
- %9 = phi double [ 1.800000e+01, %0 ], [ %10, %18 ], [ %10, %17 ], [ %10, %17 ]
- store double %9, double* %1, align 8
- store double %8, double* %2, align 8
- %10 = load double, double* %3, align 8
- %11 = load double, double* %4, align 8
- br i1 undef, label %12, label %13
+bb6: ; preds = %bb17, %bb16, %bb16, %bb
+ %i7 = phi double [ 2.800000e+01, %bb ], [ %i10, %bb17 ], [ %i10, %bb16 ], [ %i10, %bb16 ]
+ %i8 = phi double [ 1.800000e+01, %bb ], [ %i9, %bb17 ], [ %i9, %bb16 ], [ %i9, %bb16 ]
+ store double %i8, double* %i, align 8
+ store double %i7, double* %i1, align 8
+ %i9 = load double, double* %i2, align 8
+ %i10 = load double, double* %i3, align 8
+ br i1 undef, label %bb11, label %bb12
-; <label>:12 ; preds = %7
+bb11: ; preds = %bb6
ret void
-; <label>:13 ; preds = %7
- store double %10, double* %5, align 8
- store double %11, double* %6, align 8
- br i1 undef, label %14, label %15
+bb12: ; preds = %bb6
+ store double %i9, double* %i4, align 8
+ store double %i10, double* %i5, align 8
+ br i1 undef, label %bb13, label %bb14
-; <label>:14 ; preds = %13
- br label %15
+bb13: ; preds = %bb12
+ br label %bb14
-; <label>:15 ; preds = %14, %13
- br i1 undef, label %16, label %17
+bb14: ; preds = %bb13, %bb12
+ br i1 undef, label %bb15, label %bb16
-; <label>:16 ; preds = %15
+bb15: ; preds = %bb14
unreachable
-; <label>:17 ; preds = %15
- switch i32 undef, label %18 [
- i32 32, label %7
- i32 103, label %7
+bb16: ; preds = %bb14
+ switch i32 undef, label %bb17 [
+ i32 32, label %bb6
+ i32 103, label %bb6
]
-; <label>:18 ; preds = %17
- br i1 undef, label %7, label %19
+bb17: ; preds = %bb16
+ br i1 undef, label %bb6, label %bb18
-; <label>:19 ; preds = %18
+bb18: ; preds = %bb17
unreachable
}
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